ISL_AUX_USAGE_CCS_E,
};
+/**
+ * Enum for keeping track of the state an auxiliary compressed surface.
+ *
+ * For any given auxiliary surface compression format (HiZ, CCS, or MCS), any
+ * given slice (lod + array layer) can be in one of the six states described
+ * by this enum. Draw and resolve operations may cause the slice to change
+ * from one state to another. The six valid states are:
+ *
+ * 1) Clear: In this state, each block in the auxiliary surface contains a
+ * magic value that indicates that the block is in the clear state. If
+ * a block is in the clear state, it's values in the primary surface are
+ * ignored and the color of the samples in the block is taken either the
+ * RENDER_SURFACE_STATE packet for color or 3DSTATE_CLEAR_PARAMS for
+ * depth. Since neither the primary surface nor the auxiliary surface
+ * contains the clear value, the surface can be cleared to a different
+ * color by simply changing the clear color without modifying either
+ * surface.
+ *
+ * 2) Partial Clear: In this state, each block in the auxiliary surface
+ * contains either the magic clear or pass-through value. See Clear and
+ * Pass-through for more details.
+ *
+ * 3) Compressed w/ Clear: In this state, neither the auxiliary surface
+ * nor the primary surface has a complete representation of the data.
+ * Instead, both surfaces must be used together or else rendering
+ * corruption may occur. Depending on the auxiliary compression format
+ * and the data, any given block in the primary surface may contain all,
+ * some, or none of the data required to reconstruct the actual sample
+ * values. Blocks may also be in the clear state (see Clear) and have
+ * their value taken from outside the surface.
+ *
+ * 4) Compressed w/o Clear: This state is identical to the state above
+ * except that no blocks are in the clear state. In this state, all of
+ * the data required to reconstruct the final sample values is contained
+ * in the auxiliary and primary surface and the clear value is not
+ * considered.
+ *
+ * 5) Resolved: In this state, the primary surface contains 100% of the
+ * data. The auxiliary surface is also valid so the surface can be
+ * validly used with or without aux enabled. The auxiliary surface may,
+ * however, contain non-trivial data and any update to the primary
+ * surface with aux disabled will cause the two to get out of sync.
+ *
+ * 6) Pass-through: In this state, the primary surface contains 100% of the
+ * data and every block in the auxiliary surface contains a magic value
+ * which indicates that the auxiliary surface should be ignored and the
+ * only the primary surface should be considered. Updating the primary
+ * surface without aux works fine and can be done repeatedly in this
+ * mode. Writing to a surface in pass-through mode with aux enabled may
+ * cause the auxiliary buffer to contain non-trivial data and no longer
+ * be in the pass-through state.
+ *
+ * 7) Aux Invalid: In this state, the primary surface contains 100% of the
+ * data and the auxiliary surface is completely bogus. Any attempt to
+ * use the auxiliary surface is liable to result in rendering
+ * corruption. The only thing that one can do to re-enable aux once
+ * this state is reached is to use an ambiguate pass to transition into
+ * the pass-through state.
+ *
+ * Drawing with or without aux enabled may implicitly cause the surface to
+ * transition between these states. There are also four types of auxiliary
+ * compression operations which cause an explicit transition:
+ *
+ * 1) Fast Clear: This operation writes the magic "clear" value to the
+ * auxiliary surface. This operation will safely transition any slice
+ * of a surface from any state to the clear state so long as the entire
+ * slice is fast cleared at once. A fast clear that only covers part of
+ * a slice of a surface is called a partial fast clear.
+ *
+ * 2) Full Resolve: This operation combines the auxiliary surface data
+ * with the primary surface data and writes the result to the primary.
+ * For HiZ, the docs call this a depth resolve. For CCS, the hardware
+ * full resolve operation does both a full resolve and an ambiguate so
+ * it actually takes you all the way to the pass-through state.
+ *
+ * 3) Partial Resolve: This operation considers blocks which are in the
+ * "clear" state and writes the clear value directly into the primary or
+ * auxiliary surface. Once this operation completes, the surface is
+ * still compressed but no longer references the clear color. This
+ * operation is only available for CCS.
+ *
+ * 4) Ambiguate: This operation throws away the current auxiliary data and
+ * replaces it with the magic pass-through value. If an ambiguate
+ * operation is performed when the primary surface does not contain 100%
+ * of the data, data will be lost. This operation is only implemented
+ * in hardware for depth where it is called a HiZ resolve.
+ *
+ * Not all operations are valid or useful in all states. The diagram below
+ * contains a complete description of the states and all valid and useful
+ * transitions except clear.
+ *
+ * Draw w/ Aux
+ * +----------+
+ * | |
+ * | +-------------+ Draw w/ Aux +-------------+
+ * +------>| Compressed |<-------------------| Clear |
+ * | w/ Clear |----->----+ | |
+ * +-------------+ | +-------------+
+ * | /|\ | | |
+ * | | | | |
+ * | | +------<-----+ | Draw w/
+ * | | | | Clear Only
+ * | | Full | | +----------+
+ * Partial | | Resolve | \|/ | |
+ * Resolve | | | +-------------+ |
+ * | | | | Partial |<------+
+ * | | | | Clear |<----------+
+ * | | | +-------------+ |
+ * | | | | |
+ * | | +------>---------+ Full |
+ * | | | Resolve |
+ * Draw w/ aux | | Partial Fast Clear | |
+ * +----------+ | +--------------------------+ | |
+ * | | \|/ | \|/ |
+ * | +-------------+ Full Resolve +-------------+ |
+ * +------>| Compressed |------------------->| Resolved | |
+ * | w/o Clear |<-------------------| | |
+ * +-------------+ Draw w/ Aux +-------------+ |
+ * /|\ | | |
+ * | Draw | | Draw |
+ * | w/ Aux | | w/o Aux |
+ * | Ambiguate | | |
+ * | +--------------------------+ | |
+ * Draw w/o Aux | | | Draw w/o Aux |
+ * +----------+ | | | +----------+ |
+ * | | | \|/ \|/ | | |
+ * | +-------------+ Ambiguate +-------------+ | |
+ * +------>| Pass- |<-------------------| Aux |<------+ |
+ * +------>| through | | Invalid | |
+ * | +-------------+ +-------------+ |
+ * | | | |
+ * +----------+ +-----------------------------------------------------+
+ * Draw w/ Partial Fast Clear
+ * Clear Only
+ *
+ *
+ * While the above general theory applies to all forms of auxiliary
+ * compression on Intel hardware, not all states and operations are available
+ * on all compression types. However, each of the auxiliary states and
+ * operations can be fairly easily mapped onto the above diagram:
+ *
+ * HiZ: Hierarchical depth compression is capable of being in any of the
+ * states above. Hardware provides three HiZ operations: "Depth
+ * Clear", "Depth Resolve", and "HiZ Resolve" which map to "Fast
+ * Clear", "Full Resolve", and "Ambiguate" respectively. The
+ * hardware provides no HiZ partial resolve operation so the only way
+ * to get into the "Compressed w/o Clear" state is to render with HiZ
+ * when the surface is in the resolved or pass-through states.
+ *
+ * MCS: Multisample compression is technically capable of being in any of
+ * the states above except that most of them aren't useful. Both the
+ * render engine and the sampler support MCS compression and, apart
+ * from clear color, MCS is format-unaware so we leave the surface
+ * compressed 100% of the time. The hardware provides no MCS
+ * operations.
+ *
+ * CCS_D: Single-sample fast-clears (also called CCS_D in ISL) are one of
+ * the simplest forms of compression since they don't do anything
+ * beyond clear color tracking. They really only support three of
+ * the six states: Clear, Partial Clear, and Pass-through. The
+ * only CCS_D operation is "Resolve" which maps to a full resolve
+ * followed by an ambiguate.
+ *
+ * CCS_E: Single-sample render target compression (also called CCS_E in ISL)
+ * is capable of being in almost all of the above states. THe only
+ * exception is that it does not have separate resolved and pass-
+ * through states. Instead, the CCS_E full resolve operation does
+ * both a resolve and an ambiguate so it goes directly into the
+ * pass-through state. CCS_E also provides fast clear and partial
+ * resolve operations which work as described above.
+ *
+ * While it is technically possible to perform a CCS_E ambiguate, it
+ * is not provided by Sky Lake hardware so we choose to avoid the aux
+ * invalid state. If the aux invalid state were determined to be
+ * useful, a CCS ambiguate could be done by carefully rendering to
+ * the CCS and filling it with zeros.
+ */
+enum isl_aux_state {
+ ISL_AUX_STATE_CLEAR = 0,
+ ISL_AUX_STATE_PARTIAL_CLEAR,
+ ISL_AUX_STATE_COMPRESSED_CLEAR,
+ ISL_AUX_STATE_COMPRESSED_NO_CLEAR,
+ ISL_AUX_STATE_RESOLVED,
+ ISL_AUX_STATE_PASS_THROUGH,
+ ISL_AUX_STATE_AUX_INVALID,
+};
+
/* TODO(chadv): Explain */
enum isl_array_pitch_span {
ISL_ARRAY_PITCH_SPAN_FULL,
uint8_t align;
uint8_t addr_offset;
uint8_t aux_addr_offset;
+
+ /* Rounded up to the nearest dword to simplify GPU memcpy operations. */
+ uint8_t clear_value_size;
+ uint8_t clear_value_offset;
} ss;
/**
uint8_t bh; /**< Block height, in pixels */
uint8_t bd; /**< Block depth, in pixels */
- struct {
- struct isl_channel_layout r; /**< Red channel */
- struct isl_channel_layout g; /**< Green channel */
- struct isl_channel_layout b; /**< Blue channel */
- struct isl_channel_layout a; /**< Alpha channel */
- struct isl_channel_layout l; /**< Luminance channel */
- struct isl_channel_layout i; /**< Intensity channel */
- struct isl_channel_layout p; /**< Palette channel */
- } channels;
+ union {
+ struct {
+ struct isl_channel_layout r; /**< Red channel */
+ struct isl_channel_layout g; /**< Green channel */
+ struct isl_channel_layout b; /**< Blue channel */
+ struct isl_channel_layout a; /**< Alpha channel */
+ struct isl_channel_layout l; /**< Luminance channel */
+ struct isl_channel_layout i; /**< Intensity channel */
+ struct isl_channel_layout p; /**< Palette channel */
+ } channels;
+ struct isl_channel_layout channels_array[7];
+ };
enum isl_colorspace colorspace;
enum isl_txc txc;
struct isl_extent2d phys_extent_B;
};
+/**
+ * Metadata about a DRM format modifier.
+ */
+struct isl_drm_modifier_info {
+ uint64_t modifier;
+
+ /** Text name of the modifier */
+ const char *name;
+
+ /** ISL tiling implied by this modifier */
+ enum isl_tiling tiling;
+
+ /** ISL aux usage implied by this modifier */
+ enum isl_aux_usage aux_usage;
+
+ /** Whether or not this modifier supports clear color */
+ bool supports_clear_color;
+};
+
/**
* @brief Input to surface initialization
*
uint32_t samples;
/** Total size of the surface, in bytes. */
- uint32_t size;
+ uint64_t size;
/** Required alignment for the surface's base address. */
uint32_t alignment;
return fmtl->bw == 1 && fmtl->bh == 1 && fmtl->bd == 1;
}
+static inline bool
+isl_format_is_srgb(enum isl_format fmt)
+{
+ return isl_format_layouts[fmt].colorspace == ISL_COLORSPACE_SRGB;
+}
+
+enum isl_format isl_format_srgb_to_linear(enum isl_format fmt);
+
static inline bool
isl_format_is_rgb(enum isl_format fmt)
{
+ if (isl_format_is_yuv(fmt))
+ return false;
return isl_format_layouts[fmt].channels.r.bits > 0 &&
isl_format_layouts[fmt].channels.g.bits > 0 &&
isl_format_layouts[fmt].channels.b.bits > 0 &&
return (1u << tiling) & ISL_TILING_STD_Y_MASK;
}
+uint32_t
+isl_tiling_to_i915_tiling(enum isl_tiling tiling);
+
+enum isl_tiling
+isl_tiling_from_i915_tiling(uint32_t tiling);
+
+const struct isl_drm_modifier_info * ATTRIBUTE_CONST
+isl_drm_modifier_get_info(uint64_t modifier);
+
+static inline bool
+isl_drm_modifier_has_aux(uint64_t modifier)
+{
+ return isl_drm_modifier_get_info(modifier)->aux_usage != ISL_AUX_USAGE_NONE;
+}
+
+/** Returns the default isl_aux_state for the given modifier.
+ *
+ * All modified images are required to be kept out of the AUX_INVALID state
+ * but they may or may not actually be compressed and may or may not have
+ * clear color. This function returns the worst case aux_state that we need
+ * to assume when getting a surface from another process or API.
+ */
+static inline enum isl_aux_state
+isl_drm_modifier_get_default_aux_state(uint64_t modifier)
+{
+ const struct isl_drm_modifier_info *mod_info =
+ isl_drm_modifier_get_info(modifier);
+
+ if (!mod_info || mod_info->aux_usage == ISL_AUX_USAGE_NONE)
+ return ISL_AUX_STATE_AUX_INVALID;
+
+ return mod_info->supports_clear_color ? ISL_AUX_STATE_COMPRESSED_CLEAR :
+ ISL_AUX_STATE_COMPRESSED_NO_CLEAR;
+}
+
struct isl_extent2d ATTRIBUTE_CONST
isl_get_interleaved_msaa_px_size_sa(uint32_t samples);
return e;
}
+bool isl_color_value_is_zero_one(union isl_color_value value,
+ enum isl_format format);
+
#define isl_surf_init(dev, surf, ...) \
isl_surf_init_s((dev), (surf), \
&(struct isl_surf_init_info) { __VA_ARGS__ });
bool
isl_surf_get_ccs_surf(const struct isl_device *dev,
const struct isl_surf *surf,
- struct isl_surf *ccs_surf);
+ struct isl_surf *ccs_surf,
+ uint32_t row_pitch /**< Ignored if 0 */);
#define isl_surf_fill_state(dev, state, ...) \
isl_surf_fill_state_s((dev), (state), \
isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
const struct isl_buffer_fill_state_info *restrict info);
+void
+isl_null_fill_state(const struct isl_device *dev, void *state,
+ struct isl_extent3d size);
+
#define isl_emit_depth_stencil_hiz(dev, batch, ...) \
isl_emit_depth_stencil_hiz_s((dev), (batch), \
&(struct isl_depth_stencil_hiz_emit_info) { __VA_ARGS__ })
uint32_t *x_offset_el,
uint32_t *y_offset_el);
+/**
+ * Calculate the offset, in bytes and intratile surface samples, to a
+ * subimage in the surface.
+ *
+ * This is equivalent to calling isl_surf_get_image_offset_el, passing the
+ * result to isl_tiling_get_intratile_offset_el, and converting the tile
+ * offsets to samples.
+ *
+ * @invariant level < surface levels
+ * @invariant logical_array_layer < logical array length of surface
+ * @invariant logical_z_offset_px < logical depth of surface at level
+ */
+void
+isl_surf_get_image_offset_B_tile_sa(const struct isl_surf *surf,
+ uint32_t level,
+ uint32_t logical_array_layer,
+ uint32_t logical_z_offset_px,
+ uint32_t *offset_B,
+ uint32_t *x_offset_sa,
+ uint32_t *y_offset_sa);
+
+/**
+ * Create an isl_surf that represents a particular subimage in the surface.
+ *
+ * The newly created surface will have a single miplevel and array slice. The
+ * surface lives at the returned byte and intratile offsets, in samples.
+ *
+ * It is safe to call this function with surf == image_surf.
+ *
+ * @invariant level < surface levels
+ * @invariant logical_array_layer < logical array length of surface
+ * @invariant logical_z_offset_px < logical depth of surface at level
+ */
+void
+isl_surf_get_image_surf(const struct isl_device *dev,
+ const struct isl_surf *surf,
+ uint32_t level,
+ uint32_t logical_array_layer,
+ uint32_t logical_z_offset_px,
+ struct isl_surf *image_surf,
+ uint32_t *offset_B,
+ uint32_t *x_offset_sa,
+ uint32_t *y_offset_sa);
+
/**
* @brief Calculate the intratile offsets to a surface.
*
*/
void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
- uint8_t bs,
+ uint32_t bpb,
uint32_t row_pitch,
uint32_t total_x_offset_el,
uint32_t total_y_offset_el,
{
const struct isl_format_layout *fmtl = isl_format_get_layout(format);
- assert(fmtl->bpb % 8 == 0);
-
/* For computing the intratile offsets, we actually want a strange unit
* which is samples for multisampled surfaces but elements for compressed
* surfaces.
const uint32_t total_x_offset = total_x_offset_sa / fmtl->bw;
const uint32_t total_y_offset = total_y_offset_sa / fmtl->bh;
- isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb / 8, row_pitch,
+ isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb, row_pitch,
total_x_offset, total_y_offset,
base_address_offset,
x_offset_sa, y_offset_sa);