intel/isl: Add a format_supports_ccs_d helper

[mesa.git] / src / intel / isl / isl_format.c

diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c
index 43c2f4f5a9bdc077c1d60d9a8046dfc42dd5a6b9..ed5a0636eb4fb7806dd9db81b5144ccc43e7431f 100644 (file)
--- a/src/intel/isl/isl_format.c
+++ b/src/intel/isl/isl_format.c
@@ -37,7 +37,7 @@ struct surface_format_info {
    uint8_t input_vb;
    uint8_t streamed_output_vb;
    uint8_t color_processing;
-   uint8_t lossless_compression;
+   uint8_t ccs_e;
 };
 
 /* This macro allows us to write the table almost as it appears in the PRM,
@@ -97,7 +97,7 @@ static const struct surface_format_info format_info[] = {
    SF( x,  x,  x,  x,  x,  x,  Y,  x,  x,    x,   R32G32B32A32_SSCALED)
    SF( x,  x,  x,  x,  x,  x,  Y,  x,  x,    x,   R32G32B32A32_USCALED)
    SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R32G32B32A32_SFIXED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R64G64_PASSTHRU)
+   SF( x,  x,  x,  x,  x,  x, 80,  x,  x,    x,   R64G64_PASSTHRU)
    SF( Y, 50,  x,  x,  x,  x,  Y,  Y,  x,    x,   R32G32B32_FLOAT)
    SF( Y,  x,  x,  x,  x,  x,  Y,  Y,  x,    x,   R32G32B32_SINT)
    SF( Y,  x,  x,  x,  x,  x,  Y,  Y,  x,    x,   R32G32B32_UINT)
@@ -131,7 +131,7 @@ static const struct surface_format_info format_info[] = {
    SF( x,  x,  x,  x,  x,  x,  Y,  x,  x,    x,   R32G32_SSCALED)
    SF( x,  x,  x,  x,  x,  x,  Y,  x,  x,    x,   R32G32_USCALED)
    SF( x,  x,  x,  x,  x,  x, 75,  x,  x,    x,   R32G32_SFIXED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   R64_PASSTHRU)
+   SF( x,  x,  x,  x,  x,  x, 80,  x,  x,    x,   R64_PASSTHRU)
    SF( Y,  Y,  x,  Y,  Y,  Y,  Y,  x, 60,   90,   B8G8R8A8_UNORM)
    SF( Y,  Y,  x,  x,  Y,  Y,  x,  x,  x,    x,   B8G8R8A8_UNORM_SRGB)
 /* smpl filt shad CK  RT  AB  VB  SO  color ccs_e */
@@ -218,9 +218,10 @@ static const struct surface_format_info format_info[] = {
    SF(50, 50,  x,  x,  x,  x,  x,  x,  x,    x,   P8A8_UNORM_PALETTE1)
    SF( x,  x,  x,  x,  x,  x,  x,  x,  x,    x,   A1B5G5R5_UNORM)
    /* According to the PRM, A4B4G4R4_UNORM isn't supported until Sky Lake
-    * but empirical testing indicates that it works just fine on Broadwell.
+    * but empirical testing indicates that at least sampling works just fine
+    * on Broadwell.
     */
-   SF(80, 80,  x,  x, 80,  x,  x,  x,  x,    x,   A4B4G4R4_UNORM)
+   SF(80, 80,  x,  x, 90,  x,  x,  x,  x,    x,   A4B4G4R4_UNORM)
    SF(90,  x,  x,  x,  x,  x,  x,  x,  x,    x,   L8A8_UINT)
    SF(90,  x,  x,  x,  x,  x,  x,  x,  x,    x,   L8A8_SINT)
    SF( Y,  Y,  x, 45,  Y,  Y,  Y,  x,  x,    x,   R8_UNORM)
@@ -436,14 +437,36 @@ isl_format_supports_vertex_fetch(const struct gen_device_info *devinfo,
    return format_gen(devinfo) >= format_info[format].input_vb;
 }
 
+/**
+ * Returns true if the given format can support single-sample fast clears.
+ * This function only checks the format.  In order to determine if a surface
+ * supports CCS_E, several other factors need to be considered such as tiling
+ * and sample count.  See isl_surf_get_ccs_surf for details.
+ */
+bool
+isl_format_supports_ccs_d(const struct gen_device_info *devinfo,
+                          enum isl_format format)
+{
+   /* Fast clears were first added on Ivy Bridge */
+   if (devinfo->gen < 7)
+      return false;
+
+   if (!isl_format_supports_rendering(devinfo, format))
+      return false;
+
+   const struct isl_format_layout *fmtl = isl_format_get_layout(format);
+
+   return fmtl->bpb == 32 || fmtl->bpb == 64 || fmtl->bpb == 128;
+}
+
 bool
-isl_format_supports_lossless_compression(const struct gen_device_info *devinfo,
-                                         enum isl_format format)
+isl_format_supports_ccs_e(const struct gen_device_info *devinfo,
+                          enum isl_format format)
 {
    if (!format_info[format].exists)
       return false;
 
-   return format_gen(devinfo) >= format_info[format].lossless_compression;
+   return format_gen(devinfo) >= format_info[format].ccs_e;
 }
 
 bool