isl/format: Mark R9G9B9E5 as containing 9-bit unsigned float channels

[mesa.git] / src / intel / isl / isl_format_layout.csv

diff --git a/src/intel/isl/isl_format_layout.csv b/src/intel/isl/isl_format_layout.csv
index bcfea0fcd1f5f10b251a00d7c309b98fd63f9288..f90fbe063b52916fc733977d2eddb9adb25a9c7a 100644 (file)
--- a/src/intel/isl/isl_format_layout.csv
+++ b/src/intel/isl/isl_format_layout.csv
@@ -149,7 +149,7 @@ B8G8R8X8_UNORM              ,  32,  1,  1,  1,  un8,  un8,  un8,   x8,     ,
 B8G8R8X8_UNORM_SRGB         ,  32,  1,  1,  1,  un8,  un8,  un8,   x8,     ,     ,    ,   srgb,
 R8G8B8X8_UNORM              ,  32,  1,  1,  1,  un8,  un8,  un8,   x8,     ,     ,    , linear,
 R8G8B8X8_UNORM_SRGB         ,  32,  1,  1,  1,  un8,  un8,  un8,   x8,     ,     ,    ,   srgb,
-R9G9B9E5_SHAREDEXP          ,  32,  1,  1,  1,  ui9,  ui9,  ui9,     ,     ,     ,    , linear,
+R9G9B9E5_SHAREDEXP          ,  32,  1,  1,  1,  uf9,  uf9,  uf9,     ,     ,     ,    , linear,
 B10G10R10X2_UNORM           ,  32,  1,  1,  1, un10, un10, un10,   x2,     ,     ,    , linear,
 L16A16_FLOAT                ,  32,  1,  1,  1,     ,     ,     , sf16, sf16,     ,    , linear,
 R32_UNORM                   ,  32,  1,  1,  1, un32,     ,     ,     ,     ,     ,    , linear,