anv: Move nir_lower_wpos_center after dead variable elimination.

[mesa.git] / src / intel / isl / isl_gen7.c

diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
index f3d8428d059f11b7d77c1f66d01fdba00f844a7e..18687b535def99497c2790c16427e22a960fe280 100644 (file)
--- a/src/intel/isl/isl_gen7.c
+++ b/src/intel/isl/isl_gen7.c
@@ -25,13 +25,11 @@
 #include "isl_priv.h"
 
 bool
-gen7_choose_msaa_layout(const struct isl_device *dev,
-                        const struct isl_surf_init_info *info,
-                        enum isl_tiling tiling,
-                        enum isl_msaa_layout *msaa_layout)
+isl_gen7_choose_msaa_layout(const struct isl_device *dev,
+                            const struct isl_surf_init_info *info,
+                            enum isl_tiling tiling,
+                            enum isl_msaa_layout *msaa_layout)
 {
-   const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
-
    bool require_array = false;
    bool require_interleaved = false;
 
@@ -43,19 +41,7 @@ gen7_choose_msaa_layout(const struct isl_device *dev,
       return true;
    }
 
-   /* From the Ivybridge PRM, Volume 4 Part 1 p63, SURFACE_STATE, Surface
-    * Format:
-    *
-    *    If Number of Multisamples is set to a value other than
-    *    MULTISAMPLECOUNT_1, this field cannot be set to the following
-    *    formats: any format with greater than 64 bits per element, any
-    *    compressed texture format (BC*), and any YCRCB* format.
-    */
-   if (fmtl->bpb > 64)
-      return false;
-   if (isl_format_is_compressed(info->format))
-      return false;
-   if (isl_format_is_yuv(info->format))
+   if (!isl_format_supports_multisampling(dev->info, info->format))
       return false;
 
    /* From the Ivybridge PRM, Volume 4 Part 1 p73, SURFACE_STATE, Number of
@@ -169,9 +155,7 @@ static bool
 gen7_format_needs_valign2(const struct isl_device *dev,
                           enum isl_format format)
 {
-   /* This workaround applies only to gen7 */
-   if (ISL_DEV_GEN(dev) > 7)
-      return false;
+   assert(ISL_DEV_GEN(dev) == 7);
 
    /* From the Ivybridge PRM (2012-05-31), Volume 4, Part 1, Section 2.12.1,
     * RENDER_SURFACE_STATE Surface Vertical Alignment:
@@ -198,9 +182,9 @@ gen7_format_needs_valign2(const struct isl_device *dev,
  * flags except ISL_TILING_X_BIT and ISL_TILING_LINEAR_BIT.
  */
 void
-gen7_filter_tiling(const struct isl_device *dev,
-                   const struct isl_surf_init_info *restrict info,
-                   isl_tiling_flags_t *flags)
+isl_gen6_filter_tiling(const struct isl_device *dev,
+                       const struct isl_surf_init_info *restrict info,
+                       isl_tiling_flags_t *flags)
 {
    /* IVB+ requires separate stencil */
    assert(ISL_DEV_USE_SEPARATE_STENCIL(dev));
@@ -231,24 +215,16 @@ gen7_filter_tiling(const struct isl_device *dev,
       *flags &= ~ISL_TILING_W_BIT;
    }
 
-   /* The HiZ format and tiling always go together */
-   if (info->format == ISL_FORMAT_HIZ) {
-      *flags &= ISL_TILING_HIZ_BIT;
-   } else {
-      *flags &= ~ISL_TILING_HIZ_BIT;
-   }
+   /* From the SKL+ PRMs, RENDER_SURFACE_STATE:TileMode,
+    *    If Surface Format is ASTC*, this field must be TILEMODE_YMAJOR.
+    */
+   if (isl_format_get_layout(info->format)->txc == ISL_TXC_ASTC)
+      *flags &= ISL_TILING_Y0_BIT;
 
    /* MCS buffers are always Y-tiled */
    if (isl_format_get_layout(info->format)->txc == ISL_TXC_MCS)
       *flags &= ISL_TILING_Y0_BIT;
 
-   /* The CCS formats and tiling always go together */
-   if (isl_format_get_layout(info->format)->txc == ISL_TXC_CCS) {
-      *flags &= ISL_TILING_CCS_BIT;
-   } else {
-      *flags &= ~ISL_TILING_CCS_BIT;
-   }
-
    if (info->usage & (ISL_SURF_USAGE_DISPLAY_ROTATE_90_BIT |
                       ISL_SURF_USAGE_DISPLAY_ROTATE_180_BIT |
                       ISL_SURF_USAGE_DISPLAY_ROTATE_270_BIT)) {
@@ -277,9 +253,13 @@ gen7_filter_tiling(const struct isl_device *dev,
        *   For multisample render targets, this field must be 1 (true). MSRTs
        *   can only be tiled.
        *
-       * Multisample surfaces never require X tiling, and Y tiling generally
-       * performs better than X. So choose Y. (Unless it's stencil, then it
-       * must be W).
+       * From the Broadwell PRM >> Volume2d: Command Structures >>
+       * RENDER_SURFACE_STATE Tile Mode:
+       *
+       *   If Number of Multisamples is not MULTISAMPLECOUNT_1, this field
+       *   must be YMAJOR.
+       *
+       * As usual, though, stencil is special and requires W-tiling.
        */
       *flags &= (ISL_TILING_ANY_Y_MASK | ISL_TILING_W_BIT);
    }
@@ -297,6 +277,16 @@ gen7_filter_tiling(const struct isl_device *dev,
        */
       *flags &= ~ISL_TILING_Y0_BIT;
    }
+
+   /* From the Sandybridge PRM, Volume 1, Part 2, page 32:
+    *
+    *    "NOTE: 128BPE Format Color Buffer ( render target ) MUST be either
+    *     TileX or Linear."
+    *
+    * This is necessary all the way back to 965, but is permitted on Gen7+.
+    */
+   if (ISL_DEV_GEN(dev) < 7 && isl_format_get_layout(info->format)->bpb >= 128)
+      *flags &= ~ISL_TILING_Y0_BIT;
 }
 
 /**
@@ -398,13 +388,15 @@ gen7_choose_valign_el(const struct isl_device *dev,
 }
 
 void
-gen7_choose_image_alignment_el(const struct isl_device *dev,
-                               const struct isl_surf_init_info *restrict info,
-                               enum isl_tiling tiling,
-                               enum isl_dim_layout dim_layout,
-                               enum isl_msaa_layout msaa_layout,
-                               struct isl_extent3d *image_align_el)
+isl_gen7_choose_image_alignment_el(const struct isl_device *dev,
+                                   const struct isl_surf_init_info *restrict info,
+                                   enum isl_tiling tiling,
+                                   enum isl_dim_layout dim_layout,
+                                   enum isl_msaa_layout msaa_layout,
+                                   struct isl_extent3d *image_align_el)
 {
+   assert(ISL_DEV_GEN(dev) == 7);
+
    /* Handled by isl_choose_image_alignment_el */
    assert(info->format != ISL_FORMAT_HIZ);