/* For gen9 1-D textures, surface pitch is ignored */
s.SurfacePitch = 0;
} else {
- s.SurfacePitch = info->surf->row_pitch - 1;
+ s.SurfacePitch = info->surf->row_pitch_B - 1;
}
#if GEN_GEN >= 8
struct isl_tile_info tile_info;
isl_surf_get_tile_info(info->aux_surf, &tile_info);
uint32_t pitch_in_tiles =
- info->aux_surf->row_pitch / tile_info.phys_extent_B.width;
+ info->aux_surf->row_pitch_B / tile_info.phys_extent_B.width;
s.AuxiliarySurfaceBaseAddress = info->aux_address;
s.AuxiliarySurfacePitch = pitch_in_tiles - 1;
isl_genX(buffer_fill_state_s)(void *state,
const struct isl_buffer_fill_state_info *restrict info)
{
- uint64_t buffer_size = info->size;
+ uint64_t buffer_size = info->size_B;
/* Uniform and Storage buffers need to have surface size not less that the
* aligned 32-bit size of the buffer. To calculate the array lenght on
* buffer_size = (surface_size & ~3) - (surface_size & 3)
*/
if (info->format == ISL_FORMAT_RAW ||
- info->stride < isl_format_get_layout(info->format)->bpb / 8) {
- assert(info->stride == 1);
+ info->stride_B < isl_format_get_layout(info->format)->bpb / 8) {
+ assert(info->stride_B == 1);
uint64_t aligned_size = isl_align(buffer_size, 4);
buffer_size = aligned_size + (aligned_size - buffer_size);
}
- uint32_t num_elements = buffer_size / info->stride;
+ uint32_t num_elements = buffer_size / info->stride_B;
if (GEN_GEN >= 7) {
/* From the IVB PRM, SURFACE_STATE::Height,
s.Depth = ((num_elements - 1) >> 20) & 0x7f;
#endif
- s.SurfacePitch = info->stride - 1;
+ s.SurfacePitch = info->stride_B - 1;
#if GEN_GEN >= 6
s.NumberofMultisamples = MULTISAMPLECOUNT_1;