#include "common/gen_decoder.h"
#include "util/macros.h"
-#include "gen_disasm.h"
#define CSI "\e["
#define BLUE_HEADER CSI "0;44m"
{
struct gen_group *reg_spec = gen_spec_find_register_by_name(spec, name);
- if (reg_spec)
- gen_print_group(stdout, reg_spec, 0, ®, option_color == COLOR_ALWAYS);
+ if (reg_spec) {
+ gen_print_group(stdout, reg_spec, 0, ®, 0,
+ option_color == COLOR_ALWAYS);
+ }
}
struct ring_register_mapping {
- const char *ring_name;
+ unsigned ring_class;
+ unsigned ring_instance;
const char *register_name;
};
+enum {
+ RCS,
+ BCS,
+ VCS,
+ VECS,
+};
+
static const struct ring_register_mapping acthd_registers[] = {
- { "blt", "BCS_ACTHD_UDW" },
- { "bsd", "VCS_ACTHD_UDW" },
- { "bsd2", "VCS2_ACTHD_UDW" },
- { "render", "ACTHD_UDW" },
- { "vebox", "VECS_ACTHD_UDW" },
+ { BCS, 0, "BCS_ACTHD_UDW" },
+ { VCS, 0, "VCS_ACTHD_UDW" },
+ { VCS, 1, "VCS2_ACTHD_UDW" },
+ { RCS, 0, "ACTHD_UDW" },
+ { VECS, 0, "VECS_ACTHD_UDW" },
};
static const struct ring_register_mapping ctl_registers[] = {
- { "blt", "BCS_RING_BUFFER_CTL" },
- { "bsd", "VCS_RING_BUFFER_CTL" },
- { "bsd2", "VCS2_RING_BUFFER_CTL" },
- { "render", "RCS_RING_BUFFER_CTL" },
- { "vebox", "VECS_RING_BUFFER_CTL" },
+ { BCS, 0, "BCS_RING_BUFFER_CTL" },
+ { VCS, 0, "VCS_RING_BUFFER_CTL" },
+ { VCS, 1, "VCS2_RING_BUFFER_CTL" },
+ { RCS, 0, "RCS_RING_BUFFER_CTL" },
+ { VECS, 0, "VECS_RING_BUFFER_CTL" },
};
static const struct ring_register_mapping fault_registers[] = {
- { "blt", "BCS_FAULT_REG" },
- { "bsd", "VCS_FAULT_REG" },
- { "render", "RCS_FAULT_REG" },
- { "vebox", "VECS_FAULT_REG" },
+ { BCS, 0, "BCS_FAULT_REG" },
+ { VCS, 0, "VCS_FAULT_REG" },
+ { RCS, 0, "RCS_FAULT_REG" },
+ { VECS, 0, "VECS_FAULT_REG" },
};
+static int ring_name_to_class(const char *ring_name,
+ unsigned int *class)
+{
+ static const char *class_names[] = {
+ [RCS] = "rcs",
+ [BCS] = "bcs",
+ [VCS] = "vcs",
+ [VECS] = "vecs",
+ };
+ for (size_t i = 0; i < ARRAY_SIZE(class_names); i++) {
+ if (strcmp(ring_name, class_names[i]))
+ continue;
+
+ *class = i;
+ return atoi(ring_name + strlen(class_names[i]));
+ }
+
+ static const struct {
+ const char *name;
+ unsigned int class;
+ int instance;
+ } legacy_names[] = {
+ { "render", RCS, 0 },
+ { "blt", BCS, 0 },
+ { "bsd", VCS, 0 },
+ { "bsd2", VCS, 1 },
+ { "vebox", VECS, 0 },
+ };
+ for (size_t i = 0; i < ARRAY_SIZE(legacy_names); i++) {
+ if (strcmp(ring_name, legacy_names[i].name))
+ continue;
+
+ *class = legacy_names[i].class;
+ return legacy_names[i].instance;
+ }
+
+ return -1;
+}
+
static const char *
register_name_from_ring(const struct ring_register_mapping *mapping,
unsigned nb_mapping,
const char *ring_name)
{
+ unsigned int class;
+ int instance;
+
+ instance = ring_name_to_class(ring_name, &class);
+ if (instance < 0)
+ return NULL;
+
for (unsigned i = 0; i < nb_mapping; i++) {
- if (strcmp(mapping[i].ring_name, ring_name) == 0)
+ if (mapping[i].ring_class == class &&
+ mapping[i].ring_instance == instance)
return mapping[i].register_name;
}
return NULL;
instdone_register_for_ring(const struct gen_device_info *devinfo,
const char *ring_name)
{
- if (strcmp(ring_name, "blt") == 0)
- return "BCS_INSTDONE";
- else if (strcmp(ring_name, "vebox") == 0)
- return "VECS_INSTDONE";
- else if (strcmp(ring_name, "bsd") == 0)
- return "VCS_INSTDONE";
- else if (strcmp(ring_name, "render") == 0) {
+ unsigned int class;
+ int instance;
+
+ instance = ring_name_to_class(ring_name, &class);
+ if (instance < 0)
+ return NULL;
+
+ switch (class) {
+ case RCS:
if (devinfo->gen == 6)
return "INSTDONE_2";
- return "INSTDONE_1";
+ else
+ return "INSTDONE_1";
+
+ case BCS:
+ return "BCS_INSTDONE";
+
+ case VCS:
+ switch (instance) {
+ case 0:
+ return "VCS_INSTDONE";
+ case 1:
+ return "VCS2_INSTDONE";
+ default:
+ return NULL;
+ }
+
+ case VECS:
+ return "VECS_INSTDONE";
}
return NULL;
#define MAX_SECTIONS 30
static struct section sections[MAX_SECTIONS];
-static void
-disassemble_program(struct gen_disasm *disasm, const char *type,
- const struct section *instruction_section,
- uint64_t ksp)
-{
- if (!instruction_section)
- return;
-
- printf("\nReferenced %s:\n", type);
- gen_disasm_disassemble(disasm, instruction_section->data, ksp, stdout);
-}
-
-static void
-decode(struct gen_spec *spec, struct gen_disasm *disasm,
- const struct section *section)
-{
- uint64_t gtt_offset = section->gtt_offset;
- uint32_t *data = section->data;
- uint32_t *p, *end = (data + section->count);
- int length;
- struct gen_group *inst;
- const struct section *current_instruction_buffer = NULL;
-
- for (p = data; p < end; p += length) {
- const char *color = option_full_decode ? BLUE_HEADER : NORMAL,
- *reset_color = NORMAL;
- uint64_t offset = gtt_offset + 4 * (p - data);
-
- inst = gen_spec_find_instruction(spec, p);
- length = gen_group_get_length(inst, p);
- assert(inst == NULL || length > 0);
- length = MAX2(1, length);
- if (inst == NULL) {
- printf("unknown instruction %08x\n", p[0]);
- continue;
- }
- if (option_color == COLOR_NEVER) {
- color = "";
- reset_color = "";
- }
-
- printf("%s0x%08"PRIx64": 0x%08x: %-80s%s\n",
- color, offset, p[0], gen_group_get_name(inst), reset_color);
-
- gen_print_group(stdout, inst, offset, p,
- option_color == COLOR_ALWAYS);
-
- if (strcmp(inst->name, "MI_BATCH_BUFFER_END") == 0)
- break;
-
- if (strcmp(inst->name, "STATE_BASE_ADDRESS") == 0) {
- struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
-
- do {
- if (strcmp(iter.name, "Instruction Base Address") == 0) {
- uint64_t instr_base_address = strtol(iter.value, NULL, 16);
- current_instruction_buffer = NULL;
- for (int s = 0; s < MAX_SECTIONS; s++) {
- if (sections[s].gtt_offset == instr_base_address) {
- current_instruction_buffer = §ions[s];
- }
- }
- }
- } while (gen_field_iterator_next(&iter));
- } else if (strcmp(inst->name, "WM_STATE") == 0 ||
- strcmp(inst->name, "3DSTATE_PS") == 0 ||
- strcmp(inst->name, "3DSTATE_WM") == 0) {
- struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
- uint64_t ksp[3] = {0, 0, 0};
- bool enabled[3] = {false, false, false};
-
- do {
- if (strncmp(iter.name, "Kernel Start Pointer ",
- strlen("Kernel Start Pointer ")) == 0) {
- int idx = iter.name[strlen("Kernel Start Pointer ")] - '0';
- ksp[idx] = strtol(iter.value, NULL, 16);
- } else if (strcmp(iter.name, "8 Pixel Dispatch Enable") == 0) {
- enabled[0] = strcmp(iter.value, "true") == 0;
- } else if (strcmp(iter.name, "16 Pixel Dispatch Enable") == 0) {
- enabled[1] = strcmp(iter.value, "true") == 0;
- } else if (strcmp(iter.name, "32 Pixel Dispatch Enable") == 0) {
- enabled[2] = strcmp(iter.value, "true") == 0;
- }
- } while (gen_field_iterator_next(&iter));
-
- /* Reorder KSPs to be [8, 16, 32] instead of the hardware order. */
- if (enabled[0] + enabled[1] + enabled[2] == 1) {
- if (enabled[1]) {
- ksp[1] = ksp[0];
- ksp[0] = 0;
- } else if (enabled[2]) {
- ksp[2] = ksp[0];
- ksp[0] = 0;
- }
- } else {
- uint64_t tmp = ksp[1];
- ksp[1] = ksp[2];
- ksp[2] = tmp;
- }
-
- /* FINISHME: Broken for multi-program WM_STATE,
- * which Mesa does not use
- */
- if (enabled[0]) {
- disassemble_program(disasm, "SIMD8 fragment shader",
- current_instruction_buffer, ksp[0]);
- }
- if (enabled[1]) {
- disassemble_program(disasm, "SIMD16 fragment shader",
- current_instruction_buffer, ksp[1]);
- }
- if (enabled[2]) {
- disassemble_program(disasm, "SIMD32 fragment shader",
- current_instruction_buffer, ksp[2]);
- }
- printf("\n");
- } else if (strcmp(inst->name, "VS_STATE") == 0 ||
- strcmp(inst->name, "GS_STATE") == 0 ||
- strcmp(inst->name, "SF_STATE") == 0 ||
- strcmp(inst->name, "CLIP_STATE") == 0 ||
- strcmp(inst->name, "3DSTATE_DS") == 0 ||
- strcmp(inst->name, "3DSTATE_HS") == 0 ||
- strcmp(inst->name, "3DSTATE_GS") == 0 ||
- strcmp(inst->name, "3DSTATE_VS") == 0) {
- struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
- uint64_t ksp = 0;
- bool is_simd8 = false; /* vertex shaders on Gen8+ only */
- bool is_enabled = true;
-
- do {
- if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
- ksp = strtol(iter.value, NULL, 16);
- } else if (strcmp(iter.name, "SIMD8 Dispatch Enable") == 0) {
- is_simd8 = strcmp(iter.value, "true") == 0;
- } else if (strcmp(iter.name, "Dispatch Enable") == 0) {
- is_simd8 = strcmp(iter.value, "SIMD8") == 0;
- } else if (strcmp(iter.name, "Enable") == 0) {
- is_enabled = strcmp(iter.value, "true") == 0;
- }
- } while (gen_field_iterator_next(&iter));
-
- const char *type =
- strcmp(inst->name, "VS_STATE") == 0 ? "vertex shader" :
- strcmp(inst->name, "GS_STATE") == 0 ? "geometry shader" :
- strcmp(inst->name, "SF_STATE") == 0 ? "strips and fans shader" :
- strcmp(inst->name, "CLIP_STATE") == 0 ? "clip shader" :
- strcmp(inst->name, "3DSTATE_DS") == 0 ? "tessellation control shader" :
- strcmp(inst->name, "3DSTATE_HS") == 0 ? "tessellation evaluation shader" :
- strcmp(inst->name, "3DSTATE_VS") == 0 ? (is_simd8 ? "SIMD8 vertex shader" : "vec4 vertex shader") :
- strcmp(inst->name, "3DSTATE_GS") == 0 ? (is_simd8 ? "SIMD8 geometry shader" : "vec4 geometry shader") :
- NULL;
-
- if (is_enabled) {
- disassemble_program(disasm, type, current_instruction_buffer, ksp);
- printf("\n");
- }
- }
- }
-}
-
static int zlib_inflate(uint32_t **ptr, int len)
{
struct z_stream_s zstream;
return zlib_inflate(out, len);
}
+static struct gen_batch_decode_bo
+get_gen_batch_bo(void *user_data, uint64_t address)
+{
+ for (int s = 0; s < MAX_SECTIONS; s++) {
+ if (sections[s].gtt_offset <= address &&
+ address < sections[s].gtt_offset + sections[s].count) {
+ return (struct gen_batch_decode_bo) {
+ .addr = sections[s].gtt_offset,
+ .map = sections[s].data,
+ .size = sections[s].count,
+ };
+ }
+ }
+
+ return (struct gen_batch_decode_bo) { .map = NULL };
+}
+
static void
read_data_file(FILE *file)
{
uint32_t offset, value;
char *ring_name = NULL;
struct gen_device_info devinfo;
- struct gen_disasm *disasm = NULL;
int sect_num = 0;
while (getline(&line, &line_size, file) > 0) {
exit(EXIT_FAILURE);
}
- disasm = gen_disasm_create(reg);
-
printf("Detected GEN%i chipset\n", devinfo.gen);
if (xml_path == NULL)
free(line);
free(ring_name);
+ enum gen_batch_decode_flags batch_flags = 0;
+ if (option_color == COLOR_ALWAYS)
+ batch_flags |= GEN_BATCH_DECODE_IN_COLOR;
+ if (option_full_decode)
+ batch_flags |= GEN_BATCH_DECODE_FULL;
+ if (option_print_offsets)
+ batch_flags |= GEN_BATCH_DECODE_OFFSETS;
+ batch_flags |= GEN_BATCH_DECODE_FLOATS;
+
+ struct gen_batch_decode_ctx batch_ctx;
+ gen_batch_decode_ctx_init(&batch_ctx, &devinfo, stdout, batch_flags,
+ xml_path, get_gen_batch_bo, NULL);
+
+
for (int s = 0; s < sect_num; s++) {
printf("--- %s (%s) at 0x%08x %08x\n",
sections[s].buffer_name, sections[s].ring_name,
if (strcmp(sections[s].buffer_name, "batch buffer") == 0 ||
strcmp(sections[s].buffer_name, "ring buffer") == 0 ||
strcmp(sections[s].buffer_name, "HW Context") == 0) {
- decode(spec, disasm, §ions[s]);
+ gen_print_batch(&batch_ctx, sections[s].data, sections[s].count,
+ sections[s].gtt_offset);
}
+ }
+
+ gen_batch_decode_ctx_finish(&batch_ctx);
+ for (int s = 0; s < sect_num; s++) {
free(sections[s].ring_name);
free(sections[s].data);
}
-
- gen_disasm_destroy(disasm);
}
static void