#include "common/gen_decoder.h"
#include "util/macros.h"
-#include "gen_disasm.h"
#define CSI "\e["
#define BLUE_HEADER CSI "0;44m"
/* options */
static bool option_full_decode = true;
+static bool option_print_all_bb = false;
static bool option_print_offsets = true;
static enum { COLOR_AUTO, COLOR_ALWAYS, COLOR_NEVER } option_color;
static char *xml_path = NULL;
static void
print_register(struct gen_spec *spec, const char *name, uint32_t reg)
{
- struct gen_group *reg_spec = gen_spec_find_register_by_name(spec, name);
+ struct gen_group *reg_spec =
+ name ? gen_spec_find_register_by_name(spec, name) : NULL;
- if (reg_spec)
- gen_print_group(stdout, reg_spec, 0, ®, option_color == COLOR_ALWAYS);
+ if (reg_spec) {
+ gen_print_group(stdout, reg_spec, 0, ®, 0,
+ option_color == COLOR_ALWAYS);
+ }
}
struct ring_register_mapping {
- const char *ring_name;
+ enum drm_i915_gem_engine_class ring_class;
+ unsigned ring_instance;
const char *register_name;
};
static const struct ring_register_mapping acthd_registers[] = {
- { "blt", "BCS_ACTHD_UDW" },
- { "bsd", "VCS_ACTHD_UDW" },
- { "bsd2", "VCS2_ACTHD_UDW" },
- { "render", "ACTHD_UDW" },
- { "vebox", "VECS_ACTHD_UDW" },
+ { I915_ENGINE_CLASS_COPY, 0, "BCS_ACTHD_UDW" },
+ { I915_ENGINE_CLASS_VIDEO, 0, "VCS_ACTHD_UDW" },
+ { I915_ENGINE_CLASS_VIDEO, 1, "VCS2_ACTHD_UDW" },
+ { I915_ENGINE_CLASS_RENDER, 0, "ACTHD_UDW" },
+ { I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, "VECS_ACTHD_UDW" },
};
static const struct ring_register_mapping ctl_registers[] = {
- { "blt", "BCS_RING_BUFFER_CTL" },
- { "bsd", "VCS_RING_BUFFER_CTL" },
- { "bsd2", "VCS2_RING_BUFFER_CTL" },
- { "render", "RCS_RING_BUFFER_CTL" },
- { "vebox", "VECS_RING_BUFFER_CTL" },
+ { I915_ENGINE_CLASS_COPY, 0, "BCS_RING_BUFFER_CTL" },
+ { I915_ENGINE_CLASS_VIDEO, 0, "VCS_RING_BUFFER_CTL" },
+ { I915_ENGINE_CLASS_VIDEO, 1, "VCS2_RING_BUFFER_CTL" },
+ { I915_ENGINE_CLASS_RENDER, 0, "RCS_RING_BUFFER_CTL" },
+ { I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, "VECS_RING_BUFFER_CTL" },
};
static const struct ring_register_mapping fault_registers[] = {
- { "blt", "BCS_FAULT_REG" },
- { "bsd", "VCS_FAULT_REG" },
- { "render", "RCS_FAULT_REG" },
- { "vebox", "VECS_FAULT_REG" },
+ { I915_ENGINE_CLASS_COPY, 0, "BCS_FAULT_REG" },
+ { I915_ENGINE_CLASS_VIDEO, 0, "VCS_FAULT_REG" },
+ { I915_ENGINE_CLASS_RENDER, 0, "RCS_FAULT_REG" },
+ { I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, "VECS_FAULT_REG" },
};
+static int ring_name_to_class(const char *ring_name,
+ enum drm_i915_gem_engine_class *class)
+{
+ static const char *class_names[] = {
+ [I915_ENGINE_CLASS_RENDER] = "rcs",
+ [I915_ENGINE_CLASS_COPY] = "bcs",
+ [I915_ENGINE_CLASS_VIDEO] = "vcs",
+ [I915_ENGINE_CLASS_VIDEO_ENHANCE] = "vecs",
+ };
+ for (size_t i = 0; i < ARRAY_SIZE(class_names); i++) {
+ if (strncmp(ring_name, class_names[i], strlen(class_names[i])))
+ continue;
+
+ *class = i;
+ return atoi(ring_name + strlen(class_names[i]));
+ }
+
+ static const struct {
+ const char *name;
+ unsigned int class;
+ int instance;
+ } legacy_names[] = {
+ { "render", I915_ENGINE_CLASS_RENDER, 0 },
+ { "blt", I915_ENGINE_CLASS_COPY, 0 },
+ { "bsd", I915_ENGINE_CLASS_VIDEO, 0 },
+ { "bsd2", I915_ENGINE_CLASS_VIDEO, 1 },
+ { "vebox", I915_ENGINE_CLASS_VIDEO_ENHANCE, 0 },
+ };
+ for (size_t i = 0; i < ARRAY_SIZE(legacy_names); i++) {
+ if (strcmp(ring_name, legacy_names[i].name))
+ continue;
+
+ *class = legacy_names[i].class;
+ return legacy_names[i].instance;
+ }
+
+ return -1;
+}
+
static const char *
register_name_from_ring(const struct ring_register_mapping *mapping,
unsigned nb_mapping,
const char *ring_name)
{
+ enum drm_i915_gem_engine_class class;
+ int instance;
+
+ instance = ring_name_to_class(ring_name, &class);
+ if (instance < 0)
+ return NULL;
+
for (unsigned i = 0; i < nb_mapping; i++) {
- if (strcmp(mapping[i].ring_name, ring_name) == 0)
+ if (mapping[i].ring_class == class &&
+ mapping[i].ring_instance == instance)
return mapping[i].register_name;
}
return NULL;
instdone_register_for_ring(const struct gen_device_info *devinfo,
const char *ring_name)
{
- if (strcmp(ring_name, "blt") == 0)
- return "BCS_INSTDONE";
- else if (strcmp(ring_name, "vebox") == 0)
- return "VECS_INSTDONE";
- else if (strcmp(ring_name, "bsd") == 0)
- return "VCS_INSTDONE";
- else if (strcmp(ring_name, "render") == 0) {
+ enum drm_i915_gem_engine_class class;
+ int instance;
+
+ instance = ring_name_to_class(ring_name, &class);
+ if (instance < 0)
+ return NULL;
+
+ switch (class) {
+ case I915_ENGINE_CLASS_RENDER:
if (devinfo->gen == 6)
return "INSTDONE_2";
- return "INSTDONE_1";
+ else
+ return "INSTDONE_1";
+
+ case I915_ENGINE_CLASS_COPY:
+ return "BCS_INSTDONE";
+
+ case I915_ENGINE_CLASS_VIDEO:
+ switch (instance) {
+ case 0:
+ return "VCS_INSTDONE";
+ case 1:
+ return "VCS2_INSTDONE";
+ default:
+ return NULL;
+ }
+
+ case I915_ENGINE_CLASS_VIDEO_ENHANCE:
+ return "VECS_INSTDONE";
+
+ default:
+ return NULL;
}
return NULL;
#define CSI "\e["
#define NORMAL CSI "0m"
-struct program {
- const char *type;
- const char *command;
- uint64_t command_offset;
- uint64_t instruction_base_address;
- uint64_t ksp;
+struct section {
+ uint64_t gtt_offset;
+ char *ring_name;
+ const char *buffer_name;
+ uint32_t *data;
+ int dword_count;
};
-#define MAX_NUM_PROGRAMS 4096
-static struct program programs[MAX_NUM_PROGRAMS];
-static int idx_program = 0, num_programs = 0;
-
-static int next_program(void)
-{
- int ret = idx_program;
- idx_program = (idx_program + 1) % MAX_NUM_PROGRAMS;
- num_programs = MIN(num_programs + 1, MAX_NUM_PROGRAMS);
- return ret;
-}
-
-static void decode(struct gen_spec *spec,
- uint64_t gtt_offset,
- uint32_t *data,
- int count)
-{
- uint32_t *p, *end = (data + count);
- int length;
- struct gen_group *inst;
- uint64_t current_instruction_base_address = 0;
-
- for (p = data; p < end; p += length) {
- const char *color = option_full_decode ? BLUE_HEADER : NORMAL,
- *reset_color = NORMAL;
- uint64_t offset = gtt_offset + 4 * (p - data);
-
- inst = gen_spec_find_instruction(spec, p);
- length = gen_group_get_length(inst, p);
- assert(inst == NULL || length > 0);
- length = MAX2(1, length);
- if (inst == NULL) {
- printf("unknown instruction %08x\n", p[0]);
- continue;
- }
- if (option_color == COLOR_NEVER) {
- color = "";
- reset_color = "";
- }
-
- printf("%s0x%08"PRIx64": 0x%08x: %-80s%s\n",
- color, offset, p[0], gen_group_get_name(inst), reset_color);
-
- gen_print_group(stdout, inst, offset, p,
- option_color == COLOR_ALWAYS);
-
- if (strcmp(inst->name, "MI_BATCH_BUFFER_END") == 0)
- break;
-
- if (strcmp(inst->name, "STATE_BASE_ADDRESS") == 0) {
- struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
-
- while (gen_field_iterator_next(&iter)) {
- if (strcmp(iter.name, "Instruction Base Address") == 0) {
- current_instruction_base_address = strtol(iter.value, NULL, 16);
- }
- }
- } else if (strcmp(inst->name, "WM_STATE") == 0 ||
- strcmp(inst->name, "3DSTATE_PS") == 0 ||
- strcmp(inst->name, "3DSTATE_WM") == 0) {
- struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
- uint64_t ksp[3] = {0, 0, 0};
- bool enabled[3] = {false, false, false};
-
- while (gen_field_iterator_next(&iter)) {
- if (strncmp(iter.name, "Kernel Start Pointer ",
- strlen("Kernel Start Pointer ")) == 0) {
- int idx = iter.name[strlen("Kernel Start Pointer ")] - '0';
- ksp[idx] = strtol(iter.value, NULL, 16);
- } else if (strcmp(iter.name, "8 Pixel Dispatch Enable") == 0) {
- enabled[0] = strcmp(iter.value, "true") == 0;
- } else if (strcmp(iter.name, "16 Pixel Dispatch Enable") == 0) {
- enabled[1] = strcmp(iter.value, "true") == 0;
- } else if (strcmp(iter.name, "32 Pixel Dispatch Enable") == 0) {
- enabled[2] = strcmp(iter.value, "true") == 0;
- }
- }
-
- /* FINISHME: Broken for multi-program WM_STATE,
- * which Mesa does not use
- */
- if (enabled[0] + enabled[1] + enabled[2] == 1) {
- const char *type = enabled[0] ? "SIMD8 fragment shader" :
- enabled[1] ? "SIMD16 fragment shader" :
- enabled[2] ? "SIMD32 fragment shader" : NULL;
-
- programs[next_program()] = (struct program) {
- .type = type,
- .command = inst->name,
- .command_offset = offset,
- .instruction_base_address = current_instruction_base_address,
- .ksp = ksp[0],
- };
- } else {
- if (enabled[0]) /* SIMD8 */ {
- programs[next_program()] = (struct program) {
- .type = "SIMD8 fragment shader",
- .command = inst->name,
- .command_offset = offset,
- .instruction_base_address = current_instruction_base_address,
- .ksp = ksp[0], /* SIMD8 shader is specified by ksp[0] */
- };
- }
- if (enabled[1]) /* SIMD16 */ {
- programs[next_program()] = (struct program) {
- .type = "SIMD16 fragment shader",
- .command = inst->name,
- .command_offset = offset,
- .instruction_base_address = current_instruction_base_address,
- .ksp = ksp[2], /* SIMD16 shader is specified by ksp[2] */
- };
- }
- if (enabled[2]) /* SIMD32 */ {
- programs[next_program()] = (struct program) {
- .type = "SIMD32 fragment shader",
- .command = inst->name,
- .command_offset = offset,
- .instruction_base_address = current_instruction_base_address,
- .ksp = ksp[1], /* SIMD32 shader is specified by ksp[1] */
- };
- }
- }
- } else if (strcmp(inst->name, "VS_STATE") == 0 ||
- strcmp(inst->name, "GS_STATE") == 0 ||
- strcmp(inst->name, "SF_STATE") == 0 ||
- strcmp(inst->name, "CLIP_STATE") == 0 ||
- strcmp(inst->name, "3DSTATE_DS") == 0 ||
- strcmp(inst->name, "3DSTATE_HS") == 0 ||
- strcmp(inst->name, "3DSTATE_GS") == 0 ||
- strcmp(inst->name, "3DSTATE_VS") == 0) {
- struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
- uint64_t ksp = 0;
- bool is_simd8 = false; /* vertex shaders on Gen8+ only */
- bool is_enabled = true;
-
- while (gen_field_iterator_next(&iter)) {
- if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
- ksp = strtol(iter.value, NULL, 16);
- } else if (strcmp(iter.name, "SIMD8 Dispatch Enable") == 0) {
- is_simd8 = strcmp(iter.value, "true") == 0;
- } else if (strcmp(iter.name, "Dispatch Enable") == 0) {
- is_simd8 = strcmp(iter.value, "SIMD8") == 0;
- } else if (strcmp(iter.name, "Enable") == 0) {
- is_enabled = strcmp(iter.value, "true") == 0;
- }
- }
-
- const char *type =
- strcmp(inst->name, "VS_STATE") == 0 ? "vertex shader" :
- strcmp(inst->name, "GS_STATE") == 0 ? "geometry shader" :
- strcmp(inst->name, "SF_STATE") == 0 ? "strips and fans shader" :
- strcmp(inst->name, "CLIP_STATE") == 0 ? "clip shader" :
- strcmp(inst->name, "3DSTATE_DS") == 0 ? "tessellation control shader" :
- strcmp(inst->name, "3DSTATE_HS") == 0 ? "tessellation evaluation shader" :
- strcmp(inst->name, "3DSTATE_VS") == 0 ? (is_simd8 ? "SIMD8 vertex shader" : "vec4 vertex shader") :
- strcmp(inst->name, "3DSTATE_GS") == 0 ? (is_simd8 ? "SIMD8 geometry shader" : "vec4 geometry shader") :
- NULL;
-
- if (is_enabled) {
- programs[next_program()] = (struct program) {
- .type = type,
- .command = inst->name,
- .command_offset = offset,
- .instruction_base_address = current_instruction_base_address,
- .ksp = ksp,
- };
- }
- }
- }
-}
+#define MAX_SECTIONS 256
+static unsigned num_sections;
+static struct section sections[MAX_SECTIONS];
static int zlib_inflate(uint32_t **ptr, int len)
{
return zlib_inflate(out, len);
}
+static struct gen_batch_decode_bo
+get_gen_batch_bo(void *user_data, bool ppgtt, uint64_t address)
+{
+ for (int s = 0; s < num_sections; s++) {
+ if (sections[s].gtt_offset <= address &&
+ address < sections[s].gtt_offset + sections[s].dword_count * 4) {
+ return (struct gen_batch_decode_bo) {
+ .addr = sections[s].gtt_offset,
+ .map = sections[s].data,
+ .size = sections[s].dword_count * 4,
+ };
+ }
+ }
+
+ return (struct gen_batch_decode_bo) { .map = NULL };
+}
+
static void
read_data_file(FILE *file)
{
char *line = NULL;
size_t line_size;
uint32_t offset, value;
- uint64_t gtt_offset = 0;
- const char *buffer_name = "batch buffer";
char *ring_name = NULL;
struct gen_device_info devinfo;
- struct gen_disasm *disasm = NULL;
while (getline(&line, &line_size, file) > 0) {
char *new_ring_name = NULL;
if (line[0] == ':' || line[0] == '~') {
uint32_t *data = NULL;
- int count = ascii85_decode(line+1, &data, line[0] == ':');
- if (count == 0) {
+ int dword_count = ascii85_decode(line+1, &data, line[0] == ':');
+ if (dword_count == 0) {
fprintf(stderr, "ASCII85 decode failed.\n");
exit(EXIT_FAILURE);
}
-
- if (strcmp(buffer_name, "user") == 0) {
- printf("Disassembly of programs in instruction buffer at "
- "0x%08"PRIx64":\n", gtt_offset);
- for (int i = 0; i < num_programs; i++) {
- int idx = (idx_program + i) % MAX_NUM_PROGRAMS;
- if (programs[idx].instruction_base_address == gtt_offset) {
- printf("\n%s (specified by %s at batch offset "
- "0x%08"PRIx64") at offset 0x%08"PRIx64"\n",
- programs[idx].type,
- programs[idx].command,
- programs[idx].command_offset,
- programs[idx].ksp);
- gen_disasm_disassemble(disasm, data, programs[idx].ksp,
- stdout);
- }
- }
- } else if (strcmp(buffer_name, "batch buffer") == 0 ||
- strcmp(buffer_name, "ring buffer") == 0 ||
- strcmp(buffer_name, "HW Context") == 0) {
- decode(spec, gtt_offset, data, count);
- }
- free(data);
+ assert(num_sections < MAX_SECTIONS);
+ sections[num_sections].data = data;
+ sections[num_sections].dword_count = dword_count;
+ num_sections++;
continue;
}
{ "hw status", "HW status" },
{ "wa context", "WA context" },
{ "wa batchbuffer", "WA batch" },
+ { "NULL context", "Kernel context" },
{ "user", "user" },
{ "semaphores", "semaphores", },
{ "guc log buffer", "GuC log", },
{ NULL, "unknown" },
}, *b;
- printf("%s", line);
-
- gtt_offset = 0;
-
free(ring_name);
ring_name = malloc(dashes - line);
strncpy(ring_name, line, dashes - line);
break;
}
- buffer_name = b->name;
+ assert(num_sections < MAX_SECTIONS);
+ sections[num_sections].buffer_name = b->name;
+ sections[num_sections].ring_name = strdup(ring_name);
uint32_t hi, lo;
dashes = strchr(dashes, '=');
if (dashes && sscanf(dashes, "= 0x%08x %08x\n", &hi, &lo))
- gtt_offset = ((uint64_t) hi) << 32 | lo;
+ sections[num_sections].gtt_offset = ((uint64_t) hi) << 32 | lo;
continue;
}
exit(EXIT_FAILURE);
}
- disasm = gen_disasm_create(reg);
-
printf("Detected GEN%i chipset\n", devinfo.gen);
if (xml_path == NULL)
print_register(spec, reg_name, reg);
}
+ matched = sscanf(line, " SC_INSTDONE: 0x%08x\n", ®);
+ if (matched == 1)
+ print_register(spec, "SC_INSTDONE", reg);
+
+ matched = sscanf(line, " SAMPLER_INSTDONE[%*d][%*d]: 0x%08x\n", ®);
+ if (matched == 1)
+ print_register(spec, "SAMPLER_INSTDONE", reg);
+
+ matched = sscanf(line, " ROW_INSTDONE[%*d][%*d]: 0x%08x\n", ®);
+ if (matched == 1)
+ print_register(spec, "ROW_INSTDONE", reg);
+
matched = sscanf(line, " INSTDONE1: 0x%08x\n", ®);
if (matched == 1)
print_register(spec, "INSTDONE_1", reg);
}
}
- gen_disasm_destroy(disasm);
free(line);
free(ring_name);
+
+ enum gen_batch_decode_flags batch_flags = 0;
+ if (option_color == COLOR_ALWAYS)
+ batch_flags |= GEN_BATCH_DECODE_IN_COLOR;
+ if (option_full_decode)
+ batch_flags |= GEN_BATCH_DECODE_FULL;
+ if (option_print_offsets)
+ batch_flags |= GEN_BATCH_DECODE_OFFSETS;
+ batch_flags |= GEN_BATCH_DECODE_FLOATS;
+
+ struct gen_batch_decode_ctx batch_ctx;
+ gen_batch_decode_ctx_init(&batch_ctx, &devinfo, stdout, batch_flags,
+ xml_path, get_gen_batch_bo, NULL, NULL);
+
+
+ for (int s = 0; s < num_sections; s++) {
+ enum drm_i915_gem_engine_class class;
+ ring_name_to_class(sections[s].ring_name, &class);
+
+ printf("--- %s (%s) at 0x%08x %08x\n",
+ sections[s].buffer_name, sections[s].ring_name,
+ (unsigned) (sections[s].gtt_offset >> 32),
+ (unsigned) sections[s].gtt_offset);
+
+ if (option_print_all_bb ||
+ strcmp(sections[s].buffer_name, "batch buffer") == 0 ||
+ strcmp(sections[s].buffer_name, "ring buffer") == 0 ||
+ strcmp(sections[s].buffer_name, "HW Context") == 0) {
+ batch_ctx.engine = class;
+ gen_print_batch(&batch_ctx, sections[s].data,
+ sections[s].dword_count * 4,
+ sections[s].gtt_offset, false);
+ }
+ }
+
+ gen_batch_decode_ctx_finish(&batch_ctx);
+
+ for (int s = 0; s < num_sections; s++) {
+ free(sections[s].ring_name);
+ free(sections[s].data);
+ }
}
static void
" if omitted), 'always', or 'never'\n"
" --no-pager don't launch pager\n"
" --no-offsets don't print instruction offsets\n"
- " --xml=DIR load hardware xml description from directory DIR\n",
+ " --xml=DIR load hardware xml description from directory DIR\n"
+ " --all-bb print out all batchbuffers\n",
progname);
}
{ "headers", no_argument, (int *) &option_full_decode, false },
{ "color", required_argument, NULL, 'c' },
{ "xml", required_argument, NULL, 'x' },
+ { "all-bb", no_argument, (int *) &option_print_all_bb, true },
{ NULL, 0, NULL, 0 }
};
setup_pager();
if (S_ISDIR(st.st_mode)) {
- int ret;
+ ASSERTED int ret;
char *filename;
ret = asprintf(&filename, "%s/i915_error_state", path);
projects / mesa.git / blobdiff