intel/perf: split load_oa_metrics

[mesa.git] / src / intel / tools / intel_aub.h

diff --git a/src/intel/tools/intel_aub.h b/src/intel/tools/intel_aub.h
index 5f0aba8e68e76edcbcfd0f67bc6efee27ec9a666..74ca26ab9bba3ad5f22787b98cc04669e5b87c01 100644 (file)
--- a/src/intel/tools/intel_aub.h
+++ b/src/intel/tools/intel_aub.h
@@ -49,6 +49,12 @@
 #define CMD_AUB                        (7 << 29)
 
 #define CMD_AUB_HEADER         (CMD_AUB | (1 << 23) | (0x05 << 16))
+
+#define CMD_MEM_TRACE_REGISTER_POLL    (CMD_AUB | (0x2e << 23) | (0x02 << 16))
+#define CMD_MEM_TRACE_REGISTER_WRITE   (CMD_AUB | (0x2e << 23) | (0x03 << 16))
+#define CMD_MEM_TRACE_MEMORY_WRITE     (CMD_AUB | (0x2e << 23) | (0x06 << 16))
+#define CMD_MEM_TRACE_VERSION          (CMD_AUB | (0x2e << 23) | (0x0e << 16))
+
 /* DW1 */
 # define AUB_HEADER_MAJOR_SHIFT                24
 # define AUB_HEADER_MINOR_SHIFT                16
@@ -92,8 +98,29 @@
 #define AUB_TRACE_MEMTYPE_PCI          (3 << 16)
 #define AUB_TRACE_MEMTYPE_GTT_ENTRY     (4 << 16)
 
+#define AUB_MEM_TRACE_VERSION_FILE_VERSION     1
+
 /* DW2 */
 
+#define AUB_MEM_TRACE_VERSION_DEVICE_MASK      0x0000ff00
+#define AUB_MEM_TRACE_VERSION_DEVICE_SHIFT      8
+
+#define AUB_MEM_TRACE_VERSION_METHOD_MASK      0x000c0000
+#define AUB_MEM_TRACE_VERSION_METHOD_PHY       (1 << 18)
+
+#define AUB_MEM_TRACE_REGISTER_SIZE_MASK       0x000f0000
+#define AUB_MEM_TRACE_REGISTER_SIZE_DWORD      (2 << 16)
+
+#define AUB_MEM_TRACE_REGISTER_SPACE_MASK      0xf0000000
+#define AUB_MEM_TRACE_REGISTER_SPACE_MMIO      (0 << 28)
+
+/* DW3 */
+
+#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_MASK                0xf0000000
+#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT                (0 << 28)
+#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_PHYSICAL    (2 << 28)
+#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY  (4 << 28)
+
 /**
  * aub_state_struct_type enum values are encoded with the top 16 bits
  * representing the type to be delivered to the .aub file, and the bottom 16