key, key_size, kernel, kernel_size,
NULL, 0,
prog_data, prog_data_size,
- NULL, &bind_map);
+ NULL, 0, NULL, &bind_map);
if (!bin)
return false;
case 11:
device->blorp.exec = gen11_blorp_exec;
break;
+ case 12:
+ device->blorp.exec = gen12_blorp_exec;
+ break;
default:
unreachable("Unknown hardware generation");
}
* buffer. We have a single global buffer that stores the 1.0 value.
*/
const struct anv_address clear_color_addr = (struct anv_address) {
- .bo = (struct anv_bo *)&device->hiz_clear_bo
+ .bo = device->hiz_clear_bo,
};
blorp_surf->clear_color_addr = anv_to_blorp_address(clear_color_addr);
}
}
}
+static bool
+get_blorp_surf_for_anv_shadow_image(const struct anv_device *device,
+ const struct anv_image *image,
+ VkImageAspectFlags aspect,
+ struct blorp_surf *blorp_surf)
+{
+
+ uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
+ if (image->planes[plane].shadow_surface.isl.size_B == 0)
+ return false;
+
+ *blorp_surf = (struct blorp_surf) {
+ .surf = &image->planes[plane].shadow_surface.isl,
+ .addr = {
+ .buffer = image->planes[plane].address.bo,
+ .offset = image->planes[plane].address.offset +
+ image->planes[plane].shadow_surface.offset,
+ .mocs = anv_mocs_for_bo(device, image->planes[plane].address.bo),
+ },
+ };
+
+ return true;
+}
+
void anv_CmdCopyImage(
VkCommandBuffer commandBuffer,
VkImage srcImage,
dstOffset.x, dstOffset.y,
extent.width, extent.height);
}
+
+ struct blorp_surf dst_shadow_surf;
+ if (get_blorp_surf_for_anv_shadow_image(cmd_buffer->device,
+ dst_image,
+ 1UL << aspect_bit,
+ &dst_shadow_surf)) {
+ for (unsigned i = 0; i < layer_count; i++) {
+ blorp_copy(&batch, &src_surf, src_level, src_base_layer + i,
+ &dst_shadow_surf, dst_level, dst_base_layer + i,
+ srcOffset.x, srcOffset.y,
+ dstOffset.x, dstOffset.y,
+ extent.width, extent.height);
+ }
+ }
}
} else {
struct blorp_surf src_surf, dst_surf;
dstOffset.x, dstOffset.y,
extent.width, extent.height);
}
+
+ struct blorp_surf dst_shadow_surf;
+ if (get_blorp_surf_for_anv_shadow_image(cmd_buffer->device,
+ dst_image, dst_mask,
+ &dst_shadow_surf)) {
+ for (unsigned i = 0; i < layer_count; i++) {
+ blorp_copy(&batch, &src_surf, src_level, src_base_layer + i,
+ &dst_shadow_surf, dst_level, dst_base_layer + i,
+ srcOffset.x, srcOffset.y,
+ dstOffset.x, dstOffset.y,
+ extent.width, extent.height);
+ }
+ }
}
}
buffer_row_pitch, buffer_format,
&buffer.surf, &buffer_isl_surf);
+ bool dst_has_shadow = false;
+ struct blorp_surf dst_shadow_surf;
if (&image == dst) {
anv_cmd_buffer_mark_image_written(cmd_buffer, anv_image,
aspect, dst->surf.aux_usage,
dst->level,
dst->offset.z, extent.depth);
+
+ dst_has_shadow =
+ get_blorp_surf_for_anv_shadow_image(cmd_buffer->device,
+ anv_image, aspect,
+ &dst_shadow_surf);
}
for (unsigned z = 0; z < extent.depth; z++) {
src->offset.x, src->offset.y, dst->offset.x, dst->offset.y,
extent.width, extent.height);
+ if (dst_has_shadow) {
+ blorp_copy(&batch, &src->surf, src->level, src->offset.z,
+ &dst_shadow_surf, dst->level, dst->offset.z,
+ src->offset.x, src->offset.y,
+ dst->offset.x, dst->offset.y,
+ extent.width, extent.height);
+ }
+
image.offset.z++;
buffer.surf.addr.offset += buffer_layer_stride;
}
struct blorp_address src = {
.buffer = cmd_buffer->device->dynamic_state_pool.block_pool.bo,
.offset = tmp_data.offset,
- .mocs = cmd_buffer->device->default_mocs,
+ .mocs = cmd_buffer->device->isl_dev.mocs.internal,
};
struct blorp_address dst = {
.buffer = dst_buffer->address.bo,
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
- struct blorp_surf depth, stencil;
+ struct blorp_surf depth, stencil, stencil_shadow;
if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
get_blorp_surf_for_anv_image(cmd_buffer->device,
image, VK_IMAGE_ASPECT_DEPTH_BIT,
memset(&depth, 0, sizeof(depth));
}
+ bool has_stencil_shadow = false;
if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
get_blorp_surf_for_anv_image(cmd_buffer->device,
image, VK_IMAGE_ASPECT_STENCIL_BIT,
imageLayout, ISL_AUX_USAGE_NONE, &stencil);
+
+ has_stencil_shadow =
+ get_blorp_surf_for_anv_shadow_image(cmd_buffer->device, image,
+ VK_IMAGE_ASPECT_STENCIL_BIT,
+ &stencil_shadow);
} else {
memset(&stencil, 0, sizeof(stencil));
}
clear_depth, pDepthStencil->depth,
clear_stencil ? 0xff : 0,
pDepthStencil->stencil);
+
+ if (clear_stencil && has_stencil_shadow) {
+ union isl_color_value stencil_color = {
+ .u32 = { pDepthStencil->stencil, },
+ };
+ blorp_clear(&batch, &stencil_shadow,
+ ISL_FORMAT_R8_UINT, ISL_SWIZZLE_IDENTITY,
+ level, base_layer, layer_count,
+ 0, 0, level_width, level_height,
+ stencil_color, NULL);
+ }
}
}
{
static const union isl_color_value color_value = { .u32 = { 0, } };
const struct anv_subpass *subpass = cmd_buffer->state.subpass;
- const uint32_t att_idx = subpass->depth_stencil_attachment->attachment;
-
- if (att_idx == VK_ATTACHMENT_UNUSED)
+ if (!subpass->depth_stencil_attachment)
return;
+ const uint32_t att_idx = subpass->depth_stencil_attachment->attachment;
+ assert(att_idx != VK_ATTACHMENT_UNUSED);
struct anv_render_pass_attachment *pass_att =
&cmd_buffer->state.pass->attachments[att_idx];
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
+ /* We don't know who touched the main surface last so flush a bunch of
+ * caches to ensure we get good data.
+ */
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_DEPTH_CACHE_FLUSH_BIT |
+ ANV_PIPE_DATA_CACHE_FLUSH_BIT |
+ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
+ ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT;
+
struct blorp_surf surf;
get_blorp_surf_for_anv_image(cmd_buffer->device,
image, aspect,
ISL_AUX_USAGE_NONE, &surf);
assert(surf.aux_usage == ISL_AUX_USAGE_NONE);
- struct blorp_surf shadow_surf = {
- .surf = &image->planes[0].shadow_surface.isl,
- .addr = {
- .buffer = image->planes[0].address.bo,
- .offset = image->planes[0].address.offset +
- image->planes[0].shadow_surface.offset,
- .mocs = anv_mocs_for_bo(cmd_buffer->device,
- image->planes[0].address.bo),
- },
- };
+ struct blorp_surf shadow_surf;
+ get_blorp_surf_for_anv_shadow_image(cmd_buffer->device,
+ image, aspect, &shadow_surf);
for (uint32_t l = 0; l < level_count; l++) {
const uint32_t level = base_level + l;
}
}
+ /* We just wrote to the buffer with the render cache. Flush it. */
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT;
+
blorp_batch_finish(&batch);
}
ISL_AUX_USAGE_NONE, &stencil);
}
+ /* Blorp may choose to clear stencil using RGBA32_UINT for better
+ * performance. If it does this, we need to flush it out of the depth
+ * cache before rendering to it.
+ */
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_DEPTH_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
+
blorp_clear_depth_stencil(&batch, &depth, &stencil,
level, base_layer, layer_count,
area.offset.x, area.offset.y,
(aspects & VK_IMAGE_ASPECT_STENCIL_BIT) ? 0xff : 0,
stencil_value);
+ /* Blorp may choose to clear stencil using RGBA32_UINT for better
+ * performance. If it does this, we need to flush it out of the render
+ * cache before someone starts trying to do stencil on it.
+ */
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
+
+ struct blorp_surf stencil_shadow;
+ if ((aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
+ get_blorp_surf_for_anv_shadow_image(cmd_buffer->device, image,
+ VK_IMAGE_ASPECT_STENCIL_BIT,
+ &stencil_shadow)) {
+ union isl_color_value stencil_color = {
+ .u32 = { stencil_value },
+ };
+ blorp_clear(&batch, &stencil_shadow,
+ ISL_FORMAT_R8_UINT, ISL_SWIZZLE_IDENTITY,
+ level, base_layer, layer_count,
+ area.offset.x, area.offset.y,
+ area.offset.x + area.extent.width,
+ area.offset.y + area.extent.height,
+ stencil_color, NULL);
+ }
+
blorp_batch_finish(&batch);
}
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer,
- predicate ? BLORP_BATCH_PREDICATE_ENABLE : 0);
+ BLORP_BATCH_PREDICATE_ENABLE * predicate +
+ BLORP_BATCH_NO_UPDATE_CLEAR_COLOR * !clear_value);
struct blorp_surf surf;
get_blorp_surf_for_anv_image(cmd_buffer->device, image, aspect,
/* Blorp will store the clear color for us if we provide the clear color
* address and we are doing a fast clear. So we save the clear value into
- * the blorp surface. However, in some situations we want to do a fast clear
- * without changing the clear value stored in the state buffer. For those
- * cases, we set the clear color address pointer to NULL, so blorp will not
- * try to store a garbage color.
+ * the blorp surface.
*/
- if (mcs_op == ISL_AUX_OP_FAST_CLEAR) {
- if (clear_value)
- surf.clear_color = *clear_value;
- else
- surf.clear_color_addr.buffer = NULL;
- }
+ if (clear_value)
+ surf.clear_color = *clear_value;
/* From the Sky Lake PRM Vol. 7, "Render Target Fast Clear":
*
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer,
- predicate ? BLORP_BATCH_PREDICATE_ENABLE : 0);
+ BLORP_BATCH_PREDICATE_ENABLE * predicate +
+ BLORP_BATCH_NO_UPDATE_CLEAR_COLOR * !clear_value);
struct blorp_surf surf;
get_blorp_surf_for_anv_image(cmd_buffer->device, image, aspect,
/* Blorp will store the clear color for us if we provide the clear color
* address and we are doing a fast clear. So we save the clear value into
- * the blorp surface. However, in some situations we want to do a fast clear
- * without changing the clear value stored in the state buffer. For those
- * cases, we set the clear color address pointer to NULL, so blorp will not
- * try to store a garbage color.
+ * the blorp surface.
*/
- if (ccs_op == ISL_AUX_OP_FAST_CLEAR) {
- if (clear_value)
- surf.clear_color = *clear_value;
- else
- surf.clear_color_addr.buffer = NULL;
- }
+ if (clear_value)
+ surf.clear_color = *clear_value;
/* From the Sky Lake PRM Vol. 7, "Render Target Fast Clear":
*
projects / mesa.git / blobdiff