#include <fcntl.h>
#include "anv_private.h"
+#include "util/debug.h"
+
+#include "vk_format_info.h"
/**
* Exactly one bit must be set in \a aspect.
{
isl_surf_usage_flags_t isl_usage = 0;
- /* FINISHME: Support aux surfaces */
- isl_usage |= ISL_SURF_USAGE_DISABLE_AUX_BIT;
-
if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
if (vk_usage & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
- if (vk_usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) {
- switch (aspect) {
- default:
- unreachable("bad VkImageAspect");
- case VK_IMAGE_ASPECT_DEPTH_BIT:
- isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
- break;
- case VK_IMAGE_ASPECT_STENCIL_BIT:
- isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
- break;
- }
+ /* Even if we're only using it for transfer operations, clears to depth and
+ * stencil images happen as depth and stencil so they need the right ISL
+ * usage bits or else things will fall apart.
+ */
+ switch (aspect) {
+ case VK_IMAGE_ASPECT_DEPTH_BIT:
+ isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
+ break;
+ case VK_IMAGE_ASPECT_STENCIL_BIT:
+ isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
+ break;
+ case VK_IMAGE_ASPECT_COLOR_BIT:
+ break;
+ default:
+ unreachable("bad VkImageAspect");
}
if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
- /* Meta implements transfers by sampling from the source image. */
+ /* blorp implements transfers by sampling from the source image. */
isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
}
- if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) {
- /* Meta implements transfers by rendering into the destination image. */
+ if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT &&
+ aspect == VK_IMAGE_ASPECT_COLOR_BIT) {
+ /* blorp implements transfers by rendering into the destination image.
+ * Only request this with color images, as we deal with depth/stencil
+ * formats differently. */
isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
}
}
}
+static void
+add_surface(struct anv_image *image, struct anv_surface *surf)
+{
+ assert(surf->isl.size > 0); /* isl surface must be initialized */
+
+ surf->offset = align_u32(image->size, surf->isl.alignment);
+ image->size = surf->offset + surf->isl.size;
+ image->alignment = MAX2(image->alignment, surf->isl.alignment);
+}
+
/**
* Initialize the anv_image::*_surface selected by \a aspect. Then update the
* image's memory requirements (that is, the image's size and alignment).
[VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
};
- isl_tiling_flags_t tiling_flags = anv_info->isl_tiling_flags;
- if (vk_info->tiling == VK_IMAGE_TILING_LINEAR)
- tiling_flags &= ISL_TILING_LINEAR_BIT;
+ /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
+ * result with an optionally provided ISL tiling argument.
+ */
+ isl_tiling_flags_t tiling_flags =
+ (vk_info->tiling == VK_IMAGE_TILING_LINEAR) ?
+ ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK;
+
+ if (anv_info->isl_tiling_flags)
+ tiling_flags &= anv_info->isl_tiling_flags;
+
+ assert(tiling_flags);
struct anv_surface *anv_surf = get_surface(image, aspect);
- VkExtent3D extent;
- switch (vk_info->imageType) {
- case VK_IMAGE_TYPE_1D:
- extent = (VkExtent3D) { vk_info->extent.width, 1, 1 };
- break;
- case VK_IMAGE_TYPE_2D:
- extent = (VkExtent3D) { vk_info->extent.width, vk_info->extent.height, 1 };
- break;
- case VK_IMAGE_TYPE_3D:
- extent = vk_info->extent;
- break;
- default:
- unreachable("invalid image type");
- }
+ image->extent = anv_sanitize_image_extent(vk_info->imageType,
+ vk_info->extent);
- image->extent = extent;
+ enum isl_format format = anv_get_isl_format(&dev->info, vk_info->format,
+ aspect, vk_info->tiling);
+ assert(format != ISL_FORMAT_UNSUPPORTED);
ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
.dim = vk_to_isl_surf_dim[vk_info->imageType],
- .format = anv_get_isl_format(vk_info->format, aspect,
- vk_info->tiling, NULL),
- .width = extent.width,
- .height = extent.height,
- .depth = extent.depth,
+ .format = format,
+ .width = image->extent.width,
+ .height = image->extent.height,
+ .depth = image->extent.depth,
.levels = vk_info->mipLevels,
.array_len = vk_info->arrayLayers,
.samples = vk_info->samples,
.min_alignment = 0,
- .min_pitch = 0,
+ .min_pitch = anv_info->stride,
.usage = choose_isl_surf_usage(image->usage, aspect),
.tiling_flags = tiling_flags);
*/
assert(ok);
- anv_surf->offset = align_u32(image->size, anv_surf->isl.alignment);
- image->size = anv_surf->offset + anv_surf->isl.size;
- image->alignment = MAX(image->alignment, anv_surf->isl.alignment);
-
- return VK_SUCCESS;
-}
-
-/**
- * Parameter @a format is required and overrides VkImageCreateInfo::format.
- */
-static VkImageUsageFlags
-anv_image_get_full_usage(const VkImageCreateInfo *info,
- const struct anv_format *format)
-{
- VkImageUsageFlags usage = info->usage;
-
- if (info->samples > 1 &&
- (usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)) {
- /* Meta will resolve the image by binding it as a texture. */
- usage |= VK_IMAGE_USAGE_SAMPLED_BIT;
- }
+ add_surface(image, anv_surf);
- if (usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
- /* Meta will transfer from the image by binding it as a texture. */
- usage |= VK_IMAGE_USAGE_SAMPLED_BIT;
- }
+ /* Add a HiZ surface to a depth buffer that will be used for rendering.
+ */
+ if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
+ /* We don't advertise that depth buffers could be used as storage
+ * images.
+ */
+ assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
- if (usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) {
- /* For non-clear transfer operations, meta will transfer to the image by
- * binding it as a color attachment, even if the image format is not
- * a color format.
+ /* Allow the user to control HiZ enabling. Disable by default on gen7
+ * because resolves are not currently implemented pre-BDW.
*/
- usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
-
- if (anv_format_is_depth_or_stencil(format)) {
- /* vkCmdClearDepthStencilImage() only requires that
- * VK_IMAGE_USAGE_TRANSFER_SRC_BIT be set. In particular, it does
- * not require VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT. Meta
- * clears the image, though, by binding it as a depthstencil
- * attachment.
+ if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
+ /* It will never be used as an attachment, HiZ is pointless. */
+ } else if (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) {
+ /* From the 1.0.37 spec:
+ *
+ * "An attachment used as an input attachment and depth/stencil
+ * attachment must be in either VK_IMAGE_LAYOUT_GENERAL or
+ * VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL."
+ *
+ * It will never have a layout of
+ * VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, so HiZ is
+ * currently pointless. If transfer operations learn to use the HiZ
+ * buffer, we can enable HiZ for VK_IMAGE_LAYOUT_GENERAL and support
+ * input attachments.
*/
- usage |= VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT;
+ anv_finishme("Implement HiZ for input attachments");
+ } else if (!env_var_as_boolean("INTEL_VK_HIZ", dev->info.gen >= 8)) {
+ anv_finishme("Implement gen7 HiZ");
+ } else if (vk_info->mipLevels > 1) {
+ anv_finishme("Test multi-LOD HiZ");
+ } else if (vk_info->arrayLayers > 1) {
+ anv_finishme("Implement multi-arrayLayer HiZ clears and resolves");
+ } else if (dev->info.gen == 8 && vk_info->samples > 1) {
+ anv_finishme("Test gen8 multisampled HiZ");
+ } else {
+ assert(image->aux_surface.isl.size == 0);
+ ok = isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
+ &image->aux_surface.isl);
+ assert(ok);
+ add_surface(image, &image->aux_surface);
+ image->aux_usage = ISL_AUX_USAGE_HIZ;
+ }
+ } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples == 1) {
+ if (!unlikely(INTEL_DEBUG & DEBUG_NO_RBC)) {
+ assert(image->aux_surface.isl.size == 0);
+ ok = isl_surf_get_ccs_surf(&dev->isl_dev, &anv_surf->isl,
+ &image->aux_surface.isl);
+ if (ok) {
+ add_surface(image, &image->aux_surface);
+
+ /* For images created without MUTABLE_FORMAT_BIT set, we know that
+ * they will always be used with the original format. In
+ * particular, they will always be used with a format that
+ * supports color compression. If it's never used as a storage
+ * image, then it will only be used through the sampler or the as
+ * a render target. This means that it's safe to just leave
+ * compression on at all times for these formats.
+ */
+ if (!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
+ !(vk_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&
+ isl_format_supports_ccs_e(&dev->info, format)) {
+ image->aux_usage = ISL_AUX_USAGE_CCS_E;
+ }
+ }
+ }
+ } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples > 1) {
+ assert(image->aux_surface.isl.size == 0);
+ assert(!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT));
+ ok = isl_surf_get_mcs_surf(&dev->isl_dev, &anv_surf->isl,
+ &image->aux_surface.isl);
+ if (ok) {
+ add_surface(image, &image->aux_surface);
+ image->aux_usage = ISL_AUX_USAGE_MCS;
}
}
- return usage;
+ return VK_SUCCESS;
}
VkResult
ANV_FROM_HANDLE(anv_device, device, _device);
const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
struct anv_image *image = NULL;
- const struct anv_format *format = anv_format_for_vk_format(pCreateInfo->format);
VkResult r;
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
anv_assert(pCreateInfo->extent.height > 0);
anv_assert(pCreateInfo->extent.depth > 0);
- image = anv_alloc2(&device->alloc, alloc, sizeof(*image), 8,
+ image = vk_alloc2(&device->alloc, alloc, sizeof(*image), 8,
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
if (!image)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
image->type = pCreateInfo->imageType;
image->extent = pCreateInfo->extent;
image->vk_format = pCreateInfo->format;
- image->format = format;
+ image->aspects = vk_format_aspects(image->vk_format);
image->levels = pCreateInfo->mipLevels;
image->array_size = pCreateInfo->arrayLayers;
image->samples = pCreateInfo->samples;
- image->usage = anv_image_get_full_usage(pCreateInfo, format);
+ image->usage = pCreateInfo->usage;
image->tiling = pCreateInfo->tiling;
+ image->aux_usage = ISL_AUX_USAGE_NONE;
- if (likely(anv_format_is_color(format))) {
- r = make_surface(device, image, create_info,
- VK_IMAGE_ASPECT_COLOR_BIT);
+ uint32_t b;
+ for_each_bit(b, image->aspects) {
+ r = make_surface(device, image, create_info, (1 << b));
if (r != VK_SUCCESS)
goto fail;
- } else {
- if (image->format->has_depth) {
- r = make_surface(device, image, create_info,
- VK_IMAGE_ASPECT_DEPTH_BIT);
- if (r != VK_SUCCESS)
- goto fail;
- }
-
- if (image->format->has_stencil) {
- r = make_surface(device, image, create_info,
- VK_IMAGE_ASPECT_STENCIL_BIT);
- if (r != VK_SUCCESS)
- goto fail;
- }
}
*pImage = anv_image_to_handle(image);
fail:
if (image)
- anv_free2(&device->alloc, alloc, image);
+ vk_free2(&device->alloc, alloc, image);
return r;
}
return anv_image_create(device,
&(struct anv_image_create_info) {
.vk_info = pCreateInfo,
- .isl_tiling_flags = ISL_TILING_ANY_MASK,
},
pAllocator,
pImage);
const VkAllocationCallbacks *pAllocator)
{
ANV_FROM_HANDLE(anv_device, device, _device);
+ ANV_FROM_HANDLE(anv_image, image, _image);
+
+ if (!image)
+ return;
+
+ vk_free2(&device->alloc, pAllocator, image);
+}
+
+VkResult anv_BindImageMemory(
+ VkDevice _device,
+ VkImage _image,
+ VkDeviceMemory _memory,
+ VkDeviceSize memoryOffset)
+{
+ ANV_FROM_HANDLE(anv_device, device, _device);
+ ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
+ ANV_FROM_HANDLE(anv_image, image, _image);
+
+ if (mem) {
+ image->bo = &mem->bo;
+ image->offset = memoryOffset;
+ } else {
+ image->bo = NULL;
+ image->offset = 0;
+ }
+
+ if (image->aux_surface.isl.size > 0) {
+
+ /* The offset and size must be a multiple of 4K or else the
+ * anv_gem_mmap call below will return NULL.
+ */
+ assert((image->offset + image->aux_surface.offset) % 4096 == 0);
+ assert(image->aux_surface.isl.size % 4096 == 0);
+
+ /* Auxiliary surfaces need to have their memory cleared to 0 before they
+ * can be used. For CCS surfaces, this puts them in the "resolved"
+ * state so they can be used with CCS enabled before we ever touch it
+ * from the GPU. For HiZ, we need something valid or else we may get
+ * GPU hangs on some hardware and 0 works fine.
+ */
+ void *map = anv_gem_mmap(device, image->bo->gem_handle,
+ image->offset + image->aux_surface.offset,
+ image->aux_surface.isl.size,
+ device->info.has_llc ? 0 : I915_MMAP_WC);
- anv_free2(&device->alloc, pAllocator, anv_image_from_handle(_image));
+ /* If anv_gem_mmap returns NULL, it's likely that the kernel was
+ * not able to find space on the host to create a proper mapping.
+ */
+ if (map == NULL)
+ return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
+
+ memset(map, 0, image->aux_surface.isl.size);
+
+ anv_gem_munmap(map, image->aux_surface.isl.size);
+ }
+
+ return VK_SUCCESS;
}
static void
}
}
-VkResult
-anv_validate_CreateImageView(VkDevice _device,
- const VkImageViewCreateInfo *pCreateInfo,
- const VkAllocationCallbacks *pAllocator,
- VkImageView *pView)
+/**
+ * This function determines the optimal buffer to use for device
+ * accesses given a VkImageLayout and other pieces of information needed to
+ * make that determination. This does not determine the optimal buffer to
+ * use during a resolve operation.
+ *
+ * NOTE: Some layouts do not support device access.
+ *
+ * @param devinfo The device information of the Intel GPU.
+ * @param image The image that may contain a collection of buffers.
+ * @param aspects The aspect(s) of the image to be accessed.
+ * @param layout The current layout of the image aspect(s).
+ *
+ * @return The primary buffer that should be used for the given layout.
+ */
+enum isl_aux_usage
+anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
+ const struct anv_image * const image,
+ const VkImageAspectFlags aspects,
+ const VkImageLayout layout)
{
- ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
- const VkImageSubresourceRange *subresource;
- const struct anv_format *view_format_info;
-
- /* Validate structure type before dereferencing it. */
- assert(pCreateInfo);
- assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO);
- subresource = &pCreateInfo->subresourceRange;
-
- /* Validate viewType is in range before using it. */
- assert(pCreateInfo->viewType >= VK_IMAGE_VIEW_TYPE_BEGIN_RANGE);
- assert(pCreateInfo->viewType <= VK_IMAGE_VIEW_TYPE_END_RANGE);
-
- /* Validate format is in range before using it. */
- assert(pCreateInfo->format >= VK_FORMAT_BEGIN_RANGE);
- assert(pCreateInfo->format <= VK_FORMAT_END_RANGE);
- view_format_info = anv_format_for_vk_format(pCreateInfo->format);
-
- /* Validate channel swizzles. */
- assert(pCreateInfo->components.r >= VK_COMPONENT_SWIZZLE_BEGIN_RANGE);
- assert(pCreateInfo->components.r <= VK_COMPONENT_SWIZZLE_END_RANGE);
- assert(pCreateInfo->components.g >= VK_COMPONENT_SWIZZLE_BEGIN_RANGE);
- assert(pCreateInfo->components.g <= VK_COMPONENT_SWIZZLE_END_RANGE);
- assert(pCreateInfo->components.b >= VK_COMPONENT_SWIZZLE_BEGIN_RANGE);
- assert(pCreateInfo->components.b <= VK_COMPONENT_SWIZZLE_END_RANGE);
- assert(pCreateInfo->components.a >= VK_COMPONENT_SWIZZLE_BEGIN_RANGE);
- assert(pCreateInfo->components.a <= VK_COMPONENT_SWIZZLE_END_RANGE);
-
- /* Validate subresource. */
- assert(subresource->aspectMask != 0);
- assert(subresource->levelCount > 0);
- assert(subresource->layerCount > 0);
- assert(subresource->baseMipLevel < image->levels);
- assert(subresource->baseMipLevel + subresource->levelCount <= image->levels);
- assert(subresource->baseArrayLayer < image->array_size);
- assert(subresource->baseArrayLayer + subresource->layerCount <= image->array_size);
- assert(pView);
-
- const VkImageAspectFlags ds_flags = VK_IMAGE_ASPECT_DEPTH_BIT
- | VK_IMAGE_ASPECT_STENCIL_BIT;
-
- /* Validate format. */
- if (subresource->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
- assert(subresource->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
- assert(!image->format->has_depth);
- assert(!image->format->has_stencil);
- assert(!view_format_info->has_depth);
- assert(!view_format_info->has_stencil);
- assert(view_format_info->isl_layout->bs ==
- image->format->isl_layout->bs);
- } else if (subresource->aspectMask & ds_flags) {
- assert((subresource->aspectMask & ~ds_flags) == 0);
-
- if (subresource->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT) {
- assert(image->format->has_depth);
- assert(view_format_info->has_depth);
- assert(view_format_info->isl_layout->bs ==
- image->format->isl_layout->bs);
- }
+ /* Validate the inputs. */
- if (subresource->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT) {
- /* FINISHME: Is it legal to have an R8 view of S8? */
- assert(image->format->has_stencil);
- assert(view_format_info->has_stencil);
- }
- } else {
- assert(!"bad VkImageSubresourceRange::aspectFlags");
- }
+ /* The devinfo is needed as the optimal buffer varies across generations. */
+ assert(devinfo != NULL);
- return anv_CreateImageView(_device, pCreateInfo, pAllocator, pView);
-}
+ /* The layout of a NULL image is not properly defined. */
+ assert(image != NULL);
-void
-anv_fill_image_surface_state(struct anv_device *device, struct anv_state state,
- struct anv_image_view *iview,
- const VkImageViewCreateInfo *pCreateInfo,
- VkImageUsageFlagBits usage)
-{
- switch (device->info.gen) {
- case 7:
- if (device->info.is_haswell)
- gen75_fill_image_surface_state(device, state.map, iview,
- pCreateInfo, usage);
+ /* The aspects must be a subset of the image aspects. */
+ assert(aspects & image->aspects && aspects <= image->aspects);
+
+ /* Determine the optimal buffer. */
+
+ /* If there is no auxiliary surface allocated, we must use the one and only
+ * main buffer.
+ */
+ if (image->aux_surface.isl.size == 0)
+ return ISL_AUX_USAGE_NONE;
+
+ /* All images that use an auxiliary surface are required to be tiled. */
+ assert(image->tiling == VK_IMAGE_TILING_OPTIMAL);
+
+ /* On BDW+, when clearing the stencil aspect of a depth stencil image,
+ * the HiZ buffer allows us to record the clear with a relatively small
+ * number of packets. Prior to BDW, the HiZ buffer provides no known benefit
+ * to the stencil aspect.
+ */
+ if (devinfo->gen < 8 && aspects == VK_IMAGE_ASPECT_STENCIL_BIT)
+ return ISL_AUX_USAGE_NONE;
+
+ const bool color_aspect = aspects == VK_IMAGE_ASPECT_COLOR_BIT;
+
+ /* The following switch currently only handles depth stencil aspects.
+ * TODO: Handle the color aspect.
+ */
+ if (color_aspect)
+ return image->aux_usage;
+
+ switch (layout) {
+
+ /* Invalid Layouts */
+
+ /* According to the Vulkan Spec, the following layouts are valid only as
+ * initial layouts in a layout transition and don't support device access.
+ */
+ case VK_IMAGE_LAYOUT_UNDEFINED:
+ case VK_IMAGE_LAYOUT_PREINITIALIZED:
+ case VK_IMAGE_LAYOUT_RANGE_SIZE:
+ case VK_IMAGE_LAYOUT_MAX_ENUM:
+ unreachable("Invalid image layout for device access.");
+
+
+ /* Transfer Layouts
+ *
+ * This buffer could be a depth buffer used in a transfer operation. BLORP
+ * currently doesn't use HiZ for transfer operations so we must use the main
+ * buffer for this layout. TODO: Enable HiZ in BLORP.
+ */
+ case VK_IMAGE_LAYOUT_GENERAL:
+ case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
+ case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
+ return ISL_AUX_USAGE_NONE;
+
+
+ /* Sampling Layouts */
+ case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
+ assert(!color_aspect);
+ /* Fall-through */
+ case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
+ if (anv_can_sample_with_hiz(devinfo, aspects, image->samples))
+ return ISL_AUX_USAGE_HIZ;
else
- gen7_fill_image_surface_state(device, state.map, iview,
- pCreateInfo, usage);
- break;
- case 8:
- gen8_fill_image_surface_state(device, state.map, iview,
- pCreateInfo, usage);
- break;
- case 9:
- gen9_fill_image_surface_state(device, state.map, iview,
- pCreateInfo, usage);
- break;
- default:
- unreachable("unsupported gen\n");
+ return ISL_AUX_USAGE_NONE;
+
+ case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
+ assert(color_aspect);
+
+ /* On SKL+, the render buffer can be decompressed by the presentation
+ * engine. Support for this feature has not yet landed in the wider
+ * ecosystem. TODO: Update this code when support lands.
+ *
+ * From the BDW PRM, Vol 7, Render Target Resolve:
+ *
+ * If the MCS is enabled on a non-multisampled render target, the
+ * render target must be resolved before being used for other
+ * purposes (display, texture, CPU lock) The clear value from
+ * SURFACE_STATE is written into pixels in the render target
+ * indicated as clear in the MCS.
+ *
+ * Pre-SKL, the render buffer must be resolved before being used for
+ * presentation. We can infer that the auxiliary buffer is not used.
+ */
+ return ISL_AUX_USAGE_NONE;
+
+
+ /* Rendering Layouts */
+ case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
+ assert(color_aspect);
+ unreachable("Color images are not yet supported.");
+
+ case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
+ assert(!color_aspect);
+ return ISL_AUX_USAGE_HIZ;
}
- if (!device->info.has_llc)
- anv_state_clflush(state);
+ /* If the layout isn't recognized in the exhaustive switch above, the
+ * VkImageLayout value is not defined in vulkan.h.
+ */
+ unreachable("layout is not a VkImageLayout enumeration member.");
}
-static struct anv_state
-alloc_surface_state(struct anv_device *device,
- struct anv_cmd_buffer *cmd_buffer)
-{
- if (cmd_buffer) {
- return anv_cmd_buffer_alloc_surface_state(cmd_buffer);
- } else {
- return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
- }
-}
-static bool
-has_matching_storage_typed_format(const struct anv_device *device,
- enum isl_format format)
+static struct anv_state
+alloc_surface_state(struct anv_device *device)
{
- return (isl_format_get_layout(format)->bs <= 4 ||
- (isl_format_get_layout(format)->bs <= 8 &&
- (device->info.gen >= 8 || device->info.is_haswell)) ||
- device->info.gen >= 9);
+ return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
}
-static VkComponentSwizzle
+static enum isl_channel_select
remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
- struct anv_format_swizzle format_swizzle)
+ struct isl_swizzle format_swizzle)
{
if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
swizzle = component;
switch (swizzle) {
- case VK_COMPONENT_SWIZZLE_ZERO:
- return VK_COMPONENT_SWIZZLE_ZERO;
- case VK_COMPONENT_SWIZZLE_ONE:
- return VK_COMPONENT_SWIZZLE_ONE;
- case VK_COMPONENT_SWIZZLE_R:
- return VK_COMPONENT_SWIZZLE_R + format_swizzle.r;
- case VK_COMPONENT_SWIZZLE_G:
- return VK_COMPONENT_SWIZZLE_R + format_swizzle.g;
- case VK_COMPONENT_SWIZZLE_B:
- return VK_COMPONENT_SWIZZLE_R + format_swizzle.b;
- case VK_COMPONENT_SWIZZLE_A:
- return VK_COMPONENT_SWIZZLE_R + format_swizzle.a;
+ case VK_COMPONENT_SWIZZLE_ZERO: return ISL_CHANNEL_SELECT_ZERO;
+ case VK_COMPONENT_SWIZZLE_ONE: return ISL_CHANNEL_SELECT_ONE;
+ case VK_COMPONENT_SWIZZLE_R: return format_swizzle.r;
+ case VK_COMPONENT_SWIZZLE_G: return format_swizzle.g;
+ case VK_COMPONENT_SWIZZLE_B: return format_swizzle.b;
+ case VK_COMPONENT_SWIZZLE_A: return format_swizzle.a;
default:
unreachable("Invalid swizzle");
}
}
-void
-anv_image_view_init(struct anv_image_view *iview,
- struct anv_device *device,
- const VkImageViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer,
- uint32_t offset)
+
+VkResult
+anv_CreateImageView(VkDevice _device,
+ const VkImageViewCreateInfo *pCreateInfo,
+ const VkAllocationCallbacks *pAllocator,
+ VkImageView *pView)
{
+ ANV_FROM_HANDLE(anv_device, device, _device);
ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
+ struct anv_image_view *iview;
+
+ iview = vk_alloc2(&device->alloc, pAllocator, sizeof(*iview), 8,
+ VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
+ if (iview == NULL)
+ return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
+
const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
- VkImageViewCreateInfo mCreateInfo;
- memcpy(&mCreateInfo, pCreateInfo, sizeof(VkImageViewCreateInfo));
assert(range->layerCount > 0);
assert(range->baseMipLevel < image->levels);
unreachable("bad VkImageType");
case VK_IMAGE_TYPE_1D:
case VK_IMAGE_TYPE_2D:
- assert(range->baseArrayLayer + range->layerCount - 1 <= image->array_size);
+ assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
break;
case VK_IMAGE_TYPE_3D:
- assert(range->baseArrayLayer + range->layerCount - 1
+ assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
<= anv_minify(image->extent.depth, range->baseMipLevel));
break;
}
- struct anv_surface *surface =
+ const struct anv_surface *surface =
anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
iview->image = image;
iview->bo = image->bo;
- iview->offset = image->offset + surface->offset + offset;
+ iview->offset = image->offset + surface->offset;
iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;
iview->vk_format = pCreateInfo->format;
- struct anv_format_swizzle swizzle;
- iview->format = anv_get_isl_format(pCreateInfo->format, iview->aspect_mask,
- image->tiling, &swizzle);
- iview->swizzle.r = remap_swizzle(pCreateInfo->components.r,
- VK_COMPONENT_SWIZZLE_R, swizzle);
- iview->swizzle.g = remap_swizzle(pCreateInfo->components.g,
- VK_COMPONENT_SWIZZLE_G, swizzle);
- iview->swizzle.b = remap_swizzle(pCreateInfo->components.b,
- VK_COMPONENT_SWIZZLE_B, swizzle);
- iview->swizzle.a = remap_swizzle(pCreateInfo->components.a,
- VK_COMPONENT_SWIZZLE_A, swizzle);
-
- iview->base_layer = range->baseArrayLayer;
- iview->base_mip = range->baseMipLevel;
-
- if (!isl_format_is_compressed(iview->format) &&
- isl_format_is_compressed(image->format->isl_format)) {
- /* Scale the ImageView extent by the backing Image. This is used
- * internally when an uncompressed ImageView is created on a
- * compressed Image. The ImageView can therefore be used for copying
- * data from a source Image to a destination Image.
- */
- const struct isl_format_layout * isl_layout = image->format->isl_layout;
-
- iview->level_0_extent.depth = anv_minify(image->extent.depth, range->baseMipLevel);
- iview->level_0_extent.depth = DIV_ROUND_UP(iview->level_0_extent.depth, isl_layout->bd);
-
- iview->level_0_extent.height = isl_surf_get_array_pitch_el_rows(&surface->isl) * image->array_size;
- iview->level_0_extent.width = isl_surf_get_row_pitch_el(&surface->isl);
- mCreateInfo.subresourceRange.baseMipLevel = 0;
- mCreateInfo.subresourceRange.baseArrayLayer = 0;
- } else {
- iview->level_0_extent.width = image->extent.width;
- iview->level_0_extent.height = image->extent.height;
- iview->level_0_extent.depth = image->extent.depth;
- }
+ struct anv_format format = anv_get_format(&device->info, pCreateInfo->format,
+ range->aspectMask, image->tiling);
+
+ iview->isl = (struct isl_view) {
+ .format = format.isl_format,
+ .base_level = range->baseMipLevel,
+ .levels = anv_get_levelCount(image, range),
+ .base_array_layer = range->baseArrayLayer,
+ .array_len = anv_get_layerCount(image, range),
+ .swizzle = {
+ .r = remap_swizzle(pCreateInfo->components.r,
+ VK_COMPONENT_SWIZZLE_R, format.swizzle),
+ .g = remap_swizzle(pCreateInfo->components.g,
+ VK_COMPONENT_SWIZZLE_G, format.swizzle),
+ .b = remap_swizzle(pCreateInfo->components.b,
+ VK_COMPONENT_SWIZZLE_B, format.swizzle),
+ .a = remap_swizzle(pCreateInfo->components.a,
+ VK_COMPONENT_SWIZZLE_A, format.swizzle),
+ },
+ };
iview->extent = (VkExtent3D) {
- .width = anv_minify(iview->level_0_extent.width , range->baseMipLevel),
- .height = anv_minify(iview->level_0_extent.height, range->baseMipLevel),
- .depth = anv_minify(iview->level_0_extent.depth , range->baseMipLevel),
+ .width = anv_minify(image->extent.width , range->baseMipLevel),
+ .height = anv_minify(image->extent.height, range->baseMipLevel),
+ .depth = anv_minify(image->extent.depth , range->baseMipLevel),
};
- if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT) {
- iview->sampler_surface_state = alloc_surface_state(device, cmd_buffer);
+ if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
+ iview->isl.base_array_layer = 0;
+ iview->isl.array_len = iview->extent.depth;
+ }
- anv_fill_image_surface_state(device, iview->sampler_surface_state,
- iview, &mCreateInfo,
- VK_IMAGE_USAGE_SAMPLED_BIT);
+ if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
+ pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
+ iview->isl.usage = ISL_SURF_USAGE_CUBE_BIT;
} else {
- iview->sampler_surface_state.alloc_size = 0;
+ iview->isl.usage = 0;
}
- if (image->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) {
- iview->color_rt_surface_state = alloc_surface_state(device, cmd_buffer);
-
- anv_fill_image_surface_state(device, iview->color_rt_surface_state,
- iview, &mCreateInfo,
- VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT);
+ /* Input attachment surfaces for color are allocated and filled
+ * out at BeginRenderPass time because they need compression information.
+ * Compression is not yet enabled for depth textures and stencil doesn't
+ * allow compression so we can just use the texture surface state from the
+ * view.
+ */
+ if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
+ (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
+ !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
+ iview->sampler_surface_state = alloc_surface_state(device);
+
+ /* Select the optimal aux_usage for sampling. */
+ const enum isl_aux_usage surf_usage =
+ anv_layout_to_aux_usage(&device->info, image, iview->aspect_mask,
+ VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
+
+ /* If this is a HiZ buffer we can sample from with a programmable clear
+ * value (SKL+), define the clear value to the optimal constant.
+ */
+ const float red_clear_color = surf_usage == ISL_AUX_USAGE_HIZ &&
+ device->info.gen >= 9 ?
+ ANV_HZ_FC_VAL : 0.0f;
+
+ struct isl_view view = iview->isl;
+ view.usage |= ISL_SURF_USAGE_TEXTURE_BIT;
+ isl_surf_fill_state(&device->isl_dev,
+ iview->sampler_surface_state.map,
+ .surf = &surface->isl,
+ .view = &view,
+ .clear_color.f32 = { red_clear_color,},
+ .aux_surf = &image->aux_surface.isl,
+ .aux_usage = surf_usage,
+ .mocs = device->default_mocs);
+
+ anv_state_flush(device, iview->sampler_surface_state);
} else {
- iview->color_rt_surface_state.alloc_size = 0;
+ iview->sampler_surface_state.alloc_size = 0;
}
+ /* NOTE: This one needs to go last since it may stomp isl_view.format */
if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
- iview->storage_surface_state = alloc_surface_state(device, cmd_buffer);
+ iview->storage_surface_state = alloc_surface_state(device);
+ iview->writeonly_storage_surface_state = alloc_surface_state(device);
- if (has_matching_storage_typed_format(device, iview->format))
- anv_fill_image_surface_state(device, iview->storage_surface_state,
- iview, &mCreateInfo,
- VK_IMAGE_USAGE_STORAGE_BIT);
- else
+ struct isl_view view = iview->isl;
+ view.usage |= ISL_SURF_USAGE_STORAGE_BIT;
+
+ /* Write-only accesses always used a typed write instruction and should
+ * therefore use the real format.
+ */
+ isl_surf_fill_state(&device->isl_dev,
+ iview->writeonly_storage_surface_state.map,
+ .surf = &surface->isl,
+ .view = &view,
+ .aux_surf = &image->aux_surface.isl,
+ .aux_usage = image->aux_usage,
+ .mocs = device->default_mocs);
+
+ if (isl_has_matching_typed_storage_image_format(&device->info,
+ format.isl_format)) {
+ /* Typed surface reads support a very limited subset of the shader
+ * image formats. Translate it into the closest format the hardware
+ * supports.
+ */
+ view.format = isl_lower_storage_image_format(&device->info,
+ format.isl_format);
+
+ isl_surf_fill_state(&device->isl_dev,
+ iview->storage_surface_state.map,
+ .surf = &surface->isl,
+ .view = &view,
+ .aux_surf = &image->aux_surface.isl,
+ .aux_usage = image->aux_usage,
+ .mocs = device->default_mocs);
+ } else {
anv_fill_buffer_surface_state(device, iview->storage_surface_state,
ISL_FORMAT_RAW,
iview->offset,
iview->bo->size - iview->offset, 1);
+ }
+
+ isl_surf_fill_image_param(&device->isl_dev,
+ &iview->storage_image_param,
+ &surface->isl, &iview->isl);
+ anv_state_flush(device, iview->storage_surface_state);
+ anv_state_flush(device, iview->writeonly_storage_surface_state);
} else {
iview->storage_surface_state.alloc_size = 0;
+ iview->writeonly_storage_surface_state.alloc_size = 0;
}
-}
-
-VkResult
-anv_CreateImageView(VkDevice _device,
- const VkImageViewCreateInfo *pCreateInfo,
- const VkAllocationCallbacks *pAllocator,
- VkImageView *pView)
-{
- ANV_FROM_HANDLE(anv_device, device, _device);
- struct anv_image_view *view;
-
- view = anv_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
- VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
- if (view == NULL)
- return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
-
- anv_image_view_init(view, device, pCreateInfo, NULL, 0);
- *pView = anv_image_view_to_handle(view);
+ *pView = anv_image_view_to_handle(iview);
return VK_SUCCESS;
}
ANV_FROM_HANDLE(anv_device, device, _device);
ANV_FROM_HANDLE(anv_image_view, iview, _iview);
- if (iview->color_rt_surface_state.alloc_size > 0) {
- anv_state_pool_free(&device->surface_state_pool,
- iview->color_rt_surface_state);
- }
+ if (!iview)
+ return;
if (iview->sampler_surface_state.alloc_size > 0) {
anv_state_pool_free(&device->surface_state_pool,
iview->storage_surface_state);
}
- anv_free2(&device->alloc, pAllocator, iview);
+ if (iview->writeonly_storage_surface_state.alloc_size > 0) {
+ anv_state_pool_free(&device->surface_state_pool,
+ iview->writeonly_storage_surface_state);
+ }
+
+ vk_free2(&device->alloc, pAllocator, iview);
}
+
VkResult
anv_CreateBufferView(VkDevice _device,
const VkBufferViewCreateInfo *pCreateInfo,
ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
struct anv_buffer_view *view;
- view = anv_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
+ view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
if (!view)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
- const struct anv_format *format =
- anv_format_for_vk_format(pCreateInfo->format);
+ /* TODO: Handle the format swizzle? */
- view->format = format->isl_format;
+ view->format = anv_get_isl_format(&device->info, pCreateInfo->format,
+ VK_IMAGE_ASPECT_COLOR_BIT,
+ VK_IMAGE_TILING_LINEAR);
+ const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8;
view->bo = buffer->bo;
view->offset = buffer->offset + pCreateInfo->offset;
view->range = pCreateInfo->range == VK_WHOLE_SIZE ?
- buffer->size - view->offset : pCreateInfo->range;
+ buffer->size - pCreateInfo->offset : pCreateInfo->range;
+ view->range = align_down_npot_u32(view->range, format_bs);
if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
- view->surface_state =
- anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
+ view->surface_state = alloc_surface_state(device);
anv_fill_buffer_surface_state(device, view->surface_state,
view->format,
- view->offset, view->range,
- format->isl_layout->bs);
+ view->offset, view->range, format_bs);
} else {
view->surface_state = (struct anv_state){ 0 };
}
if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
- view->storage_surface_state =
- anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
+ view->storage_surface_state = alloc_surface_state(device);
+ view->writeonly_storage_surface_state = alloc_surface_state(device);
enum isl_format storage_format =
- has_matching_storage_typed_format(device, view->format) ?
- isl_lower_storage_image_format(&device->isl_dev, view->format) :
+ isl_has_matching_typed_storage_image_format(&device->info,
+ view->format) ?
+ isl_lower_storage_image_format(&device->info, view->format) :
ISL_FORMAT_RAW;
anv_fill_buffer_surface_state(device, view->storage_surface_state,
storage_format,
view->offset, view->range,
(storage_format == ISL_FORMAT_RAW ? 1 :
- format->isl_layout->bs));
+ isl_format_get_layout(storage_format)->bpb / 8));
+
+ /* Write-only accesses should use the original format. */
+ anv_fill_buffer_surface_state(device, view->writeonly_storage_surface_state,
+ view->format,
+ view->offset, view->range,
+ isl_format_get_layout(view->format)->bpb / 8);
+ isl_buffer_fill_image_param(&device->isl_dev,
+ &view->storage_image_param,
+ view->format, view->range);
} else {
view->storage_surface_state = (struct anv_state){ 0 };
+ view->writeonly_storage_surface_state = (struct anv_state){ 0 };
}
*pView = anv_buffer_view_to_handle(view);
ANV_FROM_HANDLE(anv_device, device, _device);
ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
+ if (!view)
+ return;
+
if (view->surface_state.alloc_size > 0)
anv_state_pool_free(&device->surface_state_pool,
view->surface_state);
anv_state_pool_free(&device->surface_state_pool,
view->storage_surface_state);
- anv_free2(&device->alloc, pAllocator, view);
+ if (view->writeonly_storage_surface_state.alloc_size > 0)
+ anv_state_pool_free(&device->surface_state_pool,
+ view->writeonly_storage_surface_state);
+
+ vk_free2(&device->alloc, pAllocator, view);
}
-struct anv_surface *
-anv_image_get_surface_for_aspect_mask(struct anv_image *image, VkImageAspectFlags aspect_mask)
+const struct anv_surface *
+anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
+ VkImageAspectFlags aspect_mask)
{
switch (aspect_mask) {
case VK_IMAGE_ASPECT_COLOR_BIT:
- /* Dragons will eat you.
- *
- * Meta attaches all destination surfaces as color render targets. Guess
- * what surface the Meta Dragons really want.
- */
- if (image->format->has_depth && image->format->has_stencil) {
- return &image->depth_surface;
- } else if (image->format->has_depth) {
- return &image->depth_surface;
- } else if (image->format->has_stencil) {
- return &image->stencil_surface;
- } else {
- return &image->color_surface;
- }
- break;
+ assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
+ return &image->color_surface;
case VK_IMAGE_ASPECT_DEPTH_BIT:
- assert(image->format->has_depth);
+ assert(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT);
return &image->depth_surface;
case VK_IMAGE_ASPECT_STENCIL_BIT:
- assert(image->format->has_stencil);
+ assert(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
return &image->stencil_surface;
case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
- if (image->format->has_depth && image->format->has_stencil) {
- /* FINISHME: The Vulkan spec (git a511ba2) requires support for
- * combined depth stencil formats. Specifically, it states:
- *
- * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
- * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
- *
- * Image views with both depth and stencil aspects are only valid for
- * render target attachments, in which case
- * cmd_buffer_emit_depth_stencil() will pick out both the depth and
- * stencil surfaces from the underlying surface.
- */
- return &image->depth_surface;
- } else if (image->format->has_depth) {
+ /* FINISHME: The Vulkan spec (git a511ba2) requires support for
+ * combined depth stencil formats. Specifically, it states:
+ *
+ * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
+ * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
+ *
+ * Image views with both depth and stencil aspects are only valid for
+ * render target attachments, in which case
+ * cmd_buffer_emit_depth_stencil() will pick out both the depth and
+ * stencil surfaces from the underlying surface.
+ */
+ if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
return &image->depth_surface;
- } else if (image->format->has_stencil) {
+ } else {
+ assert(image->aspects == VK_IMAGE_ASPECT_STENCIL_BIT);
return &image->stencil_surface;
}
- /* fallthrough */
default:
unreachable("image does not have aspect");
return NULL;
}
}
-
-static void
-image_param_defaults(struct brw_image_param *param)
-{
- memset(param, 0, sizeof *param);
- /* Set the swizzling shifts to all-ones to effectively disable swizzling --
- * See emit_address_calculation() in brw_fs_surface_builder.cpp for a more
- * detailed explanation of these parameters.
- */
- param->swizzling[0] = 0xff;
- param->swizzling[1] = 0xff;
-}
-
-void
-anv_image_view_fill_image_param(struct anv_device *device,
- struct anv_image_view *view,
- struct brw_image_param *param)
-{
- image_param_defaults(param);
-
- const struct isl_surf *surf = &view->image->color_surface.isl;
- const int cpp = isl_format_get_layout(surf->format)->bs;
- const struct isl_extent3d image_align_sa =
- isl_surf_get_image_alignment_sa(surf);
-
- param->size[0] = view->extent.width;
- param->size[1] = view->extent.height;
- if (surf->dim == ISL_SURF_DIM_3D) {
- param->size[2] = view->extent.depth;
- } else {
- param->size[2] = surf->logical_level0_px.array_len - view->base_layer;
- }
-
- isl_surf_get_image_offset_el(surf, view->base_mip, view->base_layer, 0,
- ¶m->offset[0], ¶m->offset[1]);
-
- param->stride[0] = cpp;
- param->stride[1] = surf->row_pitch / cpp;
-
- if (device->info.gen < 9 && surf->dim == ISL_SURF_DIM_3D) {
- param->stride[2] = util_align_npot(param->size[0], image_align_sa.w);
- param->stride[3] = util_align_npot(param->size[1], image_align_sa.h);
- } else {
- param->stride[2] = 0;
- param->stride[3] = isl_surf_get_array_pitch_el_rows(surf);
- }
-
- switch (surf->tiling) {
- case ISL_TILING_LINEAR:
- /* image_param_defaults is good enough */
- break;
-
- case ISL_TILING_X:
- /* An X tile is a rectangular block of 512x8 bytes. */
- param->tiling[0] = util_logbase2(512 / cpp);
- param->tiling[1] = util_logbase2(8);
-
- if (device->isl_dev.has_bit6_swizzling) {
- /* Right shifts required to swizzle bits 9 and 10 of the memory
- * address with bit 6.
- */
- param->swizzling[0] = 3;
- param->swizzling[1] = 4;
- }
- break;
-
- case ISL_TILING_Y0:
- /* The layout of a Y-tiled surface in memory isn't really fundamentally
- * different to the layout of an X-tiled surface, we simply pretend that
- * the surface is broken up in a number of smaller 16Bx32 tiles, each
- * one arranged in X-major order just like is the case for X-tiling.
- */
- param->tiling[0] = util_logbase2(16 / cpp);
- param->tiling[1] = util_logbase2(32);
-
- if (device->isl_dev.has_bit6_swizzling) {
- /* Right shift required to swizzle bit 9 of the memory address with
- * bit 6.
- */
- param->swizzling[0] = 3;
- param->swizzling[1] = 0xff;
- }
- break;
-
- default:
- assert(!"Unhandled storage image tiling");
- }
-
- /* 3D textures are arranged in 2D in memory with 2^lod slices per row. The
- * address calculation algorithm (emit_address_calculation() in
- * brw_fs_surface_builder.cpp) handles this as a sort of tiling with
- * modulus equal to the LOD.
- */
- param->tiling[2] = (device->info.gen < 9 && surf->dim == ISL_SURF_DIM_3D ?
- view->base_mip : 0);
-}
-
-void
-anv_buffer_view_fill_image_param(struct anv_device *device,
- struct anv_buffer_view *view,
- struct brw_image_param *param)
-{
- image_param_defaults(param);
-
- param->stride[0] = isl_format_layouts[view->format].bs;
- param->size[0] = view->range / param->stride[0];
-}
projects / mesa.git / blobdiff