#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
+#include <drm_fourcc.h>
#include "anv_private.h"
#include "util/debug.h"
#include "vk_format_info.h"
-/**
- * Exactly one bit must be set in \a aspect.
- */
static isl_surf_usage_flags_t
choose_isl_surf_usage(VkImageCreateFlags vk_create_flags,
VkImageUsageFlags vk_usage,
- VkImageAspectFlags aspect)
+ isl_surf_usage_flags_t isl_extra_usage,
+ VkImageAspectFlagBits aspect)
{
- isl_surf_usage_flags_t isl_usage = 0;
+ isl_surf_usage_flags_t isl_usage = isl_extra_usage;
if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
break;
case VK_IMAGE_ASPECT_COLOR_BIT:
+ case VK_IMAGE_ASPECT_PLANE_0_BIT_KHR:
+ case VK_IMAGE_ASPECT_PLANE_1_BIT_KHR:
+ case VK_IMAGE_ASPECT_PLANE_2_BIT_KHR:
break;
default:
unreachable("bad VkImageAspect");
return isl_usage;
}
-/**
- * Exactly one bit must be set in \a aspect.
- */
-static struct anv_surface *
-get_surface(struct anv_image *image, VkImageAspectFlags aspect)
+static isl_tiling_flags_t
+choose_isl_tiling_flags(const struct anv_image_create_info *anv_info,
+ const struct isl_drm_modifier_info *isl_mod_info)
{
- switch (aspect) {
+ const VkImageCreateInfo *base_info = anv_info->vk_info;
+ isl_tiling_flags_t flags = 0;
+
+ switch (base_info->tiling) {
default:
- unreachable("bad VkImageAspect");
- case VK_IMAGE_ASPECT_COLOR_BIT:
- return &image->color_surface;
- case VK_IMAGE_ASPECT_DEPTH_BIT:
- return &image->depth_surface;
- case VK_IMAGE_ASPECT_STENCIL_BIT:
- return &image->stencil_surface;
+ unreachable("bad VkImageTiling");
+ case VK_IMAGE_TILING_OPTIMAL:
+ flags = ISL_TILING_ANY_MASK;
+ break;
+ case VK_IMAGE_TILING_LINEAR:
+ flags = ISL_TILING_LINEAR_BIT;
+ break;
}
+
+ if (anv_info->isl_tiling_flags)
+ flags &= anv_info->isl_tiling_flags;
+
+ if (isl_mod_info)
+ flags &= 1 << isl_mod_info->tiling;
+
+ assert(flags);
+
+ return flags;
+}
+
+static struct anv_surface *
+get_surface(struct anv_image *image, VkImageAspectFlagBits aspect)
+{
+ uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
+ return &image->planes[plane].surface;
}
static void
-add_surface(struct anv_image *image, struct anv_surface *surf)
+add_surface(struct anv_image *image, struct anv_surface *surf, uint32_t plane)
{
assert(surf->isl.size > 0); /* isl surface must be initialized */
- surf->offset = align_u32(image->size, surf->isl.alignment);
+ if (image->disjoint) {
+ surf->offset = align_u32(image->planes[plane].size, surf->isl.alignment);
+ /* Plane offset is always 0 when it's disjoint. */
+ } else {
+ surf->offset = align_u32(image->size, surf->isl.alignment);
+ /* Determine plane's offset only once when the first surface is added. */
+ if (image->planes[plane].size == 0)
+ image->planes[plane].offset = image->size;
+ }
+
image->size = surf->offset + surf->isl.size;
+ image->planes[plane].size = (surf->offset + surf->isl.size) - image->planes[plane].offset;
+
image->alignment = MAX2(image->alignment, surf->isl.alignment);
+ image->planes[plane].alignment = MAX2(image->planes[plane].alignment,
+ surf->isl.alignment);
}
*/
static void
add_fast_clear_state_buffer(struct anv_image *image,
+ VkImageAspectFlagBits aspect,
+ uint32_t plane,
const struct anv_device *device)
{
assert(image && device);
- assert(image->aux_surface.isl.size > 0 &&
- image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
+ assert(image->planes[plane].aux_surface.isl.size > 0 &&
+ image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
/* The offset to the buffer of clear values must be dword-aligned for GPU
* memcpy operations. It is located immediately after the auxiliary surface.
/* Auxiliary buffers should be a multiple of 4K, so the start of the clear
* values buffer should already be dword-aligned.
*/
- assert(image->aux_surface.isl.size % 4 == 0);
+ assert((image->planes[plane].offset + image->planes[plane].size) % 4 == 0);
- /* This buffer should be at the very end of the image. */
- assert(image->size ==
- image->aux_surface.offset + image->aux_surface.isl.size);
+ /* This buffer should be at the very end of the plane. */
+ if (image->disjoint) {
+ assert(image->planes[plane].size ==
+ (image->planes[plane].offset + image->planes[plane].size));
+ } else {
+ assert(image->size ==
+ (image->planes[plane].offset + image->planes[plane].size));
+ }
const unsigned entry_size = anv_fast_clear_state_entry_size(device);
/* There's no padding between entries, so ensure that they're always a
* multiple of 32 bits in order to enable GPU memcpy operations.
*/
assert(entry_size % 4 == 0);
- image->size += entry_size * anv_image_aux_levels(image);
+
+ const unsigned plane_state_size =
+ entry_size * anv_image_aux_levels(image, aspect);
+
+ image->planes[plane].fast_clear_state_offset =
+ image->planes[plane].offset + image->planes[plane].size;
+
+ image->planes[plane].size += plane_state_size;
+ image->size += plane_state_size;
}
/**
* Initialize the anv_image::*_surface selected by \a aspect. Then update the
* image's memory requirements (that is, the image's size and alignment).
- *
- * Exactly one bit must be set in \a aspect.
*/
static VkResult
make_surface(const struct anv_device *dev,
struct anv_image *image,
const struct anv_image_create_info *anv_info,
- VkImageAspectFlags aspect)
+ isl_tiling_flags_t tiling_flags,
+ VkImageAspectFlagBits aspect)
{
const VkImageCreateInfo *vk_info = anv_info->vk_info;
bool ok UNUSED;
[VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
};
- /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
- * result with an optionally provided ISL tiling argument.
- */
- isl_tiling_flags_t tiling_flags =
- (vk_info->tiling == VK_IMAGE_TILING_LINEAR) ?
- ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK;
-
- if (anv_info->isl_tiling_flags)
- tiling_flags &= anv_info->isl_tiling_flags;
-
- assert(tiling_flags);
-
- struct anv_surface *anv_surf = get_surface(image, aspect);
-
image->extent = anv_sanitize_image_extent(vk_info->imageType,
vk_info->extent);
- enum isl_format format = anv_get_isl_format(&dev->info, vk_info->format,
- aspect, vk_info->tiling);
- assert(format != ISL_FORMAT_UNSUPPORTED);
+ const unsigned plane = anv_image_aspect_to_plane(image->aspects, aspect);
+ const struct anv_format_plane plane_format =
+ anv_get_format_plane(&dev->info, image->vk_format, aspect, image->tiling);
+ struct anv_surface *anv_surf = &image->planes[plane].surface;
+
+ const isl_surf_usage_flags_t usage =
+ choose_isl_surf_usage(vk_info->flags, image->usage,
+ anv_info->isl_extra_usage_flags, aspect);
/* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
* fall back to linear on Broadwell and earlier because we aren't
if (dev->info.gen <= 8 &&
(vk_info->flags & VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT_KHR) &&
vk_info->tiling == VK_IMAGE_TILING_OPTIMAL) {
- assert(isl_format_is_compressed(format));
+ assert(isl_format_is_compressed(plane_format.isl_format));
tiling_flags = ISL_TILING_LINEAR_BIT;
needs_shadow = true;
}
ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
.dim = vk_to_isl_surf_dim[vk_info->imageType],
- .format = format,
- .width = image->extent.width,
- .height = image->extent.height,
+ .format = plane_format.isl_format,
+ .width = image->extent.width / plane_format.denominator_scales[0],
+ .height = image->extent.height / plane_format.denominator_scales[1],
.depth = image->extent.depth,
.levels = vk_info->mipLevels,
.array_len = vk_info->arrayLayers,
.samples = vk_info->samples,
.min_alignment = 0,
.row_pitch = anv_info->stride,
- .usage = choose_isl_surf_usage(vk_info->flags, image->usage, aspect),
+ .usage = usage,
.tiling_flags = tiling_flags);
- /* isl_surf_init() will fail only if provided invalid input. Invalid input
- * is illegal in Vulkan.
- */
- assert(ok);
+ if (!ok)
+ return VK_ERROR_OUT_OF_DEVICE_MEMORY;
+
+ image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
- add_surface(image, anv_surf);
+ add_surface(image, anv_surf, plane);
/* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
* create an identical tiled shadow surface for use while texturing so we
assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
assert(tiling_flags == ISL_TILING_LINEAR_BIT);
- ok = isl_surf_init(&dev->isl_dev, &image->shadow_surface.isl,
+ ok = isl_surf_init(&dev->isl_dev, &image->planes[plane].shadow_surface.isl,
.dim = vk_to_isl_surf_dim[vk_info->imageType],
- .format = format,
+ .format = plane_format.isl_format,
.width = image->extent.width,
.height = image->extent.height,
.depth = image->extent.depth,
.samples = vk_info->samples,
.min_alignment = 0,
.row_pitch = anv_info->stride,
- .usage = choose_isl_surf_usage(image->usage, image->usage, aspect),
+ .usage = usage,
.tiling_flags = ISL_TILING_ANY_MASK);
/* isl_surf_init() will fail only if provided invalid input. Invalid input
*/
assert(ok);
- add_surface(image, &image->shadow_surface);
+ add_surface(image, &image->planes[plane].shadow_surface, plane);
}
/* Add a HiZ surface to a depth buffer that will be used for rendering.
} else if (dev->info.gen == 8 && vk_info->samples > 1) {
anv_perf_warn(dev->instance, image, "Enable gen8 multisampled HiZ");
} else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
- assert(image->aux_surface.isl.size == 0);
- ok = isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
- &image->aux_surface.isl);
+ assert(image->planes[plane].aux_surface.isl.size == 0);
+ ok = isl_surf_get_hiz_surf(&dev->isl_dev,
+ &image->planes[plane].surface.isl,
+ &image->planes[plane].aux_surface.isl);
assert(ok);
- add_surface(image, &image->aux_surface);
- image->aux_usage = ISL_AUX_USAGE_HIZ;
+ add_surface(image, &image->planes[plane].aux_surface, plane);
+ image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
}
- } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples == 1) {
- if (!unlikely(INTEL_DEBUG & DEBUG_NO_RBC)) {
- assert(image->aux_surface.isl.size == 0);
- ok = isl_surf_get_ccs_surf(&dev->isl_dev, &anv_surf->isl,
- &image->aux_surface.isl, 0);
+ } else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && vk_info->samples == 1) {
+ /* TODO: Disallow compression with :
+ *
+ * 1) non multiplanar images (We appear to hit a sampler bug with
+ * CCS & R16G16 format. Putting the clear state a page/4096bytes
+ * further fixes the issue).
+ *
+ * 2) alias images, because they might be aliases of images
+ * described in 1)
+ *
+ * 3) compression disabled by debug
+ */
+ const bool allow_compression =
+ image->n_planes == 1 &&
+ (vk_info->flags & VK_IMAGE_CREATE_ALIAS_BIT_KHR) == 0 &&
+ likely((INTEL_DEBUG & DEBUG_NO_RBC) == 0);
+
+ if (allow_compression) {
+ assert(image->planes[plane].aux_surface.isl.size == 0);
+ ok = isl_surf_get_ccs_surf(&dev->isl_dev,
+ &image->planes[plane].surface.isl,
+ &image->planes[plane].aux_surface.isl, 0);
if (ok) {
/* Disable CCS when it is not useful (i.e., when you can't render
* to the image with CCS enabled).
*/
- if (!isl_format_supports_rendering(&dev->info, format)) {
+ if (!isl_format_supports_rendering(&dev->info,
+ plane_format.isl_format)) {
/* While it may be technically possible to enable CCS for this
* image, we currently don't have things hooked up to get it
* working.
anv_perf_warn(dev->instance, image,
"This image format doesn't support rendering. "
"Not allocating an CCS buffer.");
- image->aux_surface.isl.size = 0;
+ image->planes[plane].aux_surface.isl.size = 0;
return VK_SUCCESS;
}
- add_surface(image, &image->aux_surface);
- add_fast_clear_state_buffer(image, dev);
+ add_surface(image, &image->planes[plane].aux_surface, plane);
+ add_fast_clear_state_buffer(image, aspect, plane, dev);
/* For images created without MUTABLE_FORMAT_BIT set, we know that
* they will always be used with the original format. In
*/
if (!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
all_formats_ccs_e_compatible(&dev->info, vk_info)) {
- image->aux_usage = ISL_AUX_USAGE_CCS_E;
+ image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
}
}
}
- } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples > 1) {
- assert(image->aux_surface.isl.size == 0);
+ } else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && vk_info->samples > 1) {
assert(!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT));
- ok = isl_surf_get_mcs_surf(&dev->isl_dev, &anv_surf->isl,
- &image->aux_surface.isl);
+ assert(image->planes[plane].aux_surface.isl.size == 0);
+ ok = isl_surf_get_mcs_surf(&dev->isl_dev,
+ &image->planes[plane].surface.isl,
+ &image->planes[plane].aux_surface.isl);
if (ok) {
- add_surface(image, &image->aux_surface);
- add_fast_clear_state_buffer(image, dev);
- image->aux_usage = ISL_AUX_USAGE_MCS;
+ add_surface(image, &image->planes[plane].aux_surface, plane);
+ add_fast_clear_state_buffer(image, aspect, plane, dev);
+ image->planes[plane].aux_usage = ISL_AUX_USAGE_MCS;
}
}
+ assert((image->planes[plane].offset + image->planes[plane].size) == image->size);
+
+ /* Upper bound of the last surface should be smaller than the plane's
+ * size.
+ */
+ assert((MAX2(image->planes[plane].surface.offset,
+ image->planes[plane].aux_surface.offset) +
+ (image->planes[plane].aux_surface.isl.size > 0 ?
+ image->planes[plane].aux_surface.isl.size :
+ image->planes[plane].surface.isl.size)) <=
+ (image->planes[plane].offset + image->planes[plane].size));
+
+ if (image->planes[plane].aux_surface.isl.size) {
+ /* assert(image->planes[plane].fast_clear_state_offset == */
+ /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size)); */
+ assert(image->planes[plane].fast_clear_state_offset <
+ (image->planes[plane].offset + image->planes[plane].size));
+ }
+
return VK_SUCCESS;
}
+static const struct isl_drm_modifier_info *
+get_legacy_scanout_drm_format_mod(VkImageTiling tiling)
+{
+ switch (tiling) {
+ case VK_IMAGE_TILING_OPTIMAL:
+ return isl_drm_modifier_get_info(I915_FORMAT_MOD_X_TILED);
+ case VK_IMAGE_TILING_LINEAR:
+ return isl_drm_modifier_get_info(DRM_FORMAT_MOD_LINEAR);
+ default:
+ unreachable("bad VkImageTiling");
+ }
+}
+
VkResult
anv_image_create(VkDevice _device,
const struct anv_image_create_info *create_info,
{
ANV_FROM_HANDLE(anv_device, device, _device);
const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
+ const struct isl_drm_modifier_info *isl_mod_info = NULL;
struct anv_image *image = NULL;
VkResult r;
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
+ const struct wsi_image_create_info *wsi_info =
+ vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
+ if (wsi_info && wsi_info->scanout)
+ isl_mod_info = get_legacy_scanout_drm_format_mod(pCreateInfo->tiling);
+
anv_assert(pCreateInfo->mipLevels > 0);
anv_assert(pCreateInfo->arrayLayers > 0);
anv_assert(pCreateInfo->samples > 0);
image->type = pCreateInfo->imageType;
image->extent = pCreateInfo->extent;
image->vk_format = pCreateInfo->format;
+ image->format = anv_get_format(pCreateInfo->format);
image->aspects = vk_format_aspects(image->vk_format);
image->levels = pCreateInfo->mipLevels;
image->array_size = pCreateInfo->arrayLayers;
image->samples = pCreateInfo->samples;
image->usage = pCreateInfo->usage;
image->tiling = pCreateInfo->tiling;
- image->aux_usage = ISL_AUX_USAGE_NONE;
+ image->disjoint = pCreateInfo->flags & VK_IMAGE_CREATE_DISJOINT_BIT_KHR;
+ image->drm_format_mod = isl_mod_info ? isl_mod_info->modifier :
+ DRM_FORMAT_MOD_INVALID;
+
+ const struct anv_format *format = anv_get_format(image->vk_format);
+ assert(format != NULL);
+
+ const isl_tiling_flags_t isl_tiling_flags =
+ choose_isl_tiling_flags(create_info, isl_mod_info);
+
+ image->n_planes = format->n_planes;
uint32_t b;
for_each_bit(b, image->aspects) {
- r = make_surface(device, image, create_info, (1 << b));
+ r = make_surface(device, image, create_info, isl_tiling_flags,
+ (1 << b));
if (r != VK_SUCCESS)
goto fail;
}
const VkAllocationCallbacks *pAllocator,
VkImage *pImage)
{
+#ifdef ANDROID
+ const VkNativeBufferANDROID *gralloc_info =
+ vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
+
+ if (gralloc_info)
+ return anv_image_from_gralloc(device, pCreateInfo, gralloc_info,
+ pAllocator, pImage);
+#endif
+
return anv_image_create(device,
&(struct anv_image_create_info) {
.vk_info = pCreateInfo,
if (!image)
return;
+ for (uint32_t p = 0; p < image->n_planes; ++p) {
+ if (image->planes[p].bo_is_owned) {
+ assert(image->planes[p].bo != NULL);
+ anv_bo_cache_release(device, &device->bo_cache, image->planes[p].bo);
+ }
+ }
+
vk_free2(&device->alloc, pAllocator, image);
}
-static void
-anv_bind_image_memory(const VkBindImageMemoryInfoKHR *pBindInfo)
+static void anv_image_bind_memory_plane(struct anv_device *device,
+ struct anv_image *image,
+ uint32_t plane,
+ struct anv_device_memory *memory,
+ uint32_t memory_offset)
{
- ANV_FROM_HANDLE(anv_device_memory, mem, pBindInfo->memory);
- ANV_FROM_HANDLE(anv_image, image, pBindInfo->image);
-
- assert(pBindInfo->sType == VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_INFO_KHR);
+ assert(!image->planes[plane].bo_is_owned);
- if (mem == NULL) {
- image->bo = NULL;
- image->offset = 0;
+ if (!memory) {
+ image->planes[plane].bo = NULL;
+ image->planes[plane].bo_offset = 0;
return;
}
- image->bo = mem->bo;
- image->offset = pBindInfo->memoryOffset;
+ image->planes[plane].bo = memory->bo;
+ image->planes[plane].bo_offset = memory_offset;
}
VkResult anv_BindImageMemory(
- VkDevice device,
- VkImage image,
- VkDeviceMemory memory,
+ VkDevice _device,
+ VkImage _image,
+ VkDeviceMemory _memory,
VkDeviceSize memoryOffset)
{
- anv_bind_image_memory(
- &(VkBindImageMemoryInfoKHR) {
- .sType = VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_INFO_KHR,
- .image = image,
- .memory = memory,
- .memoryOffset = memoryOffset,
- });
+ ANV_FROM_HANDLE(anv_device, device, _device);
+ ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
+ ANV_FROM_HANDLE(anv_image, image, _image);
+
+ uint32_t aspect_bit;
+ anv_foreach_image_aspect_bit(aspect_bit, image, image->aspects) {
+ uint32_t plane =
+ anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
+ anv_image_bind_memory_plane(device, image, plane, mem, memoryOffset);
+ }
return VK_SUCCESS;
}
VkResult anv_BindImageMemory2KHR(
- VkDevice device,
+ VkDevice _device,
uint32_t bindInfoCount,
const VkBindImageMemoryInfoKHR* pBindInfos)
{
- for (uint32_t i = 0; i < bindInfoCount; i++)
- anv_bind_image_memory(&pBindInfos[i]);
+ ANV_FROM_HANDLE(anv_device, device, _device);
+
+ for (uint32_t i = 0; i < bindInfoCount; i++) {
+ const VkBindImageMemoryInfoKHR *bind_info = &pBindInfos[i];
+ ANV_FROM_HANDLE(anv_device_memory, mem, bind_info->memory);
+ ANV_FROM_HANDLE(anv_image, image, bind_info->image);
+ VkImageAspectFlags aspects = image->aspects;
+
+ vk_foreach_struct_const(s, bind_info->pNext) {
+ switch (s->sType) {
+ case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO_KHR: {
+ const VkBindImagePlaneMemoryInfoKHR *plane_info =
+ (const VkBindImagePlaneMemoryInfoKHR *) s;
+
+ aspects = plane_info->planeAspect;
+ break;
+ }
+ default:
+ anv_debug_ignored_stype(s->sType);
+ break;
+ }
+ }
+
+ uint32_t aspect_bit;
+ anv_foreach_image_aspect_bit(aspect_bit, image, aspects) {
+ uint32_t plane =
+ anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
+ anv_image_bind_memory_plane(device, image, plane,
+ mem, bind_info->memoryOffset);
+ }
+ }
return VK_SUCCESS;
}
-static void
-anv_surface_get_subresource_layout(struct anv_image *image,
- struct anv_surface *surface,
- const VkImageSubresource *subresource,
- VkSubresourceLayout *layout)
+void anv_GetImageSubresourceLayout(
+ VkDevice device,
+ VkImage _image,
+ const VkImageSubresource* subresource,
+ VkSubresourceLayout* layout)
{
+ ANV_FROM_HANDLE(anv_image, image, _image);
+ const struct anv_surface *surface =
+ get_surface(image, subresource->aspectMask);
+
+ assert(__builtin_popcount(subresource->aspectMask) == 1);
+
/* If we are on a non-zero mip level or array slice, we need to
* calculate a real offset.
*/
layout->size = surface->isl.size;
}
-void anv_GetImageSubresourceLayout(
- VkDevice device,
- VkImage _image,
- const VkImageSubresource* pSubresource,
- VkSubresourceLayout* pLayout)
-{
- ANV_FROM_HANDLE(anv_image, image, _image);
-
- assert(__builtin_popcount(pSubresource->aspectMask) == 1);
-
- switch (pSubresource->aspectMask) {
- case VK_IMAGE_ASPECT_COLOR_BIT:
- anv_surface_get_subresource_layout(image, &image->color_surface,
- pSubresource, pLayout);
- break;
- case VK_IMAGE_ASPECT_DEPTH_BIT:
- anv_surface_get_subresource_layout(image, &image->depth_surface,
- pSubresource, pLayout);
- break;
- case VK_IMAGE_ASPECT_STENCIL_BIT:
- anv_surface_get_subresource_layout(image, &image->stencil_surface,
- pSubresource, pLayout);
- break;
- default:
- assert(!"Invalid image aspect");
- }
-}
-
/**
* This function determines the optimal buffer to use for a given
* VkImageLayout and other pieces of information needed to make that
*
* @param devinfo The device information of the Intel GPU.
* @param image The image that may contain a collection of buffers.
- * @param aspects The aspect(s) of the image to be accessed.
+ * @param aspect The aspect of the image to be accessed.
* @param layout The current layout of the image aspect(s).
*
* @return The primary buffer that should be used for the given layout.
/* Determine the optimal buffer. */
+ uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
+
/* If there is no auxiliary surface allocated, we must use the one and only
* main buffer.
*/
- if (image->aux_surface.isl.size == 0)
+ if (image->planes[plane].aux_surface.isl.size == 0)
return ISL_AUX_USAGE_NONE;
/* All images that use an auxiliary surface are required to be tiled. */
assert(image->tiling == VK_IMAGE_TILING_OPTIMAL);
/* Stencil has no aux */
- if (aspect == VK_IMAGE_ASPECT_STENCIL_BIT)
- return ISL_AUX_USAGE_NONE;
-
- const bool color_aspect = aspect == VK_IMAGE_ASPECT_COLOR_BIT;
-
- /* The following switch currently only handles depth stencil aspects.
- * TODO: Handle the color aspect.
- */
- if (color_aspect)
- return image->aux_usage;
+ assert(aspect != VK_IMAGE_ASPECT_STENCIL_BIT);
switch (layout) {
/* Transfer Layouts
- *
- * This buffer could be a depth buffer used in a transfer operation. BLORP
- * currently doesn't use HiZ for transfer operations so we must use the main
- * buffer for this layout. TODO: Enable HiZ in BLORP.
*/
case VK_IMAGE_LAYOUT_GENERAL:
case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
- return ISL_AUX_USAGE_NONE;
+ if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
+ /* This buffer could be a depth buffer used in a transfer operation.
+ * BLORP currently doesn't use HiZ for transfer operations so we must
+ * use the main buffer for this layout. TODO: Enable HiZ in BLORP.
+ */
+ assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ);
+ return ISL_AUX_USAGE_NONE;
+ } else {
+ assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
+ return image->planes[plane].aux_usage;
+ }
/* Sampling Layouts */
case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
- assert(!color_aspect);
+ case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL_KHR:
+ assert((image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
/* Fall-through */
case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
- case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL_KHR:
- assert(aspect == VK_IMAGE_ASPECT_DEPTH_BIT);
- if (anv_can_sample_with_hiz(devinfo, image))
- return ISL_AUX_USAGE_HIZ;
- else
- return ISL_AUX_USAGE_NONE;
+ if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
+ if (anv_can_sample_with_hiz(devinfo, image))
+ return ISL_AUX_USAGE_HIZ;
+ else
+ return ISL_AUX_USAGE_NONE;
+ } else {
+ return image->planes[plane].aux_usage;
+ }
+
case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
- assert(color_aspect);
+ assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
/* On SKL+, the render buffer can be decompressed by the presentation
* engine. Support for this feature has not yet landed in the wider
/* Rendering Layouts */
case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
- assert(color_aspect);
- unreachable("Color images are not yet supported.");
+ assert(aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
+ if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE) {
+ assert(image->samples == 1);
+ return ISL_AUX_USAGE_CCS_D;
+ } else {
+ assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_CCS_D);
+ return image->planes[plane].aux_usage;
+ }
case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL_KHR:
unreachable("layout is not a VkImageLayout enumeration member.");
}
+/**
+ * This function returns the level of unresolved fast-clear support of the
+ * given image in the given VkImageLayout.
+ *
+ * @param devinfo The device information of the Intel GPU.
+ * @param image The image that may contain a collection of buffers.
+ * @param aspect The aspect of the image to be accessed.
+ * @param layout The current layout of the image aspect(s).
+ */
+enum anv_fast_clear_type
+anv_layout_to_fast_clear_type(const struct gen_device_info * const devinfo,
+ const struct anv_image * const image,
+ const VkImageAspectFlagBits aspect,
+ const VkImageLayout layout)
+{
+ /* The aspect must be exactly one of the image aspects. */
+ assert(_mesa_bitcount(aspect) == 1 && (aspect & image->aspects));
+
+ uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
+
+ /* If there is no auxiliary surface allocated, there are no fast-clears */
+ if (image->planes[plane].aux_surface.isl.size == 0)
+ return ANV_FAST_CLEAR_NONE;
+
+ /* All images that use an auxiliary surface are required to be tiled. */
+ assert(image->tiling == VK_IMAGE_TILING_OPTIMAL);
+
+ /* Stencil has no aux */
+ assert(aspect != VK_IMAGE_ASPECT_STENCIL_BIT);
+
+ if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
+ /* For depth images (with HiZ), the layout supports fast-clears if and
+ * only if it supports HiZ. However, we only support fast-clears to the
+ * default depth value.
+ */
+ enum isl_aux_usage aux_usage =
+ anv_layout_to_aux_usage(devinfo, image, aspect, layout);
+ return aux_usage == ISL_AUX_USAGE_HIZ ?
+ ANV_FAST_CLEAR_DEFAULT_VALUE : ANV_FAST_CLEAR_NONE;
+ }
+
+ assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
+
+ /* Multisample fast-clear is not yet supported. */
+ if (image->samples > 1)
+ return ANV_FAST_CLEAR_NONE;
+
+ switch (layout) {
+ case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
+ return ANV_FAST_CLEAR_ANY;
+
+ case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
+ return ANV_FAST_CLEAR_NONE;
+
+ default:
+ /* If the image has CCS_E enabled all the time then we can use
+ * fast-clear as long as the clear color is the default value of zero
+ * since this is the default value we program into every surface state
+ * used for texturing.
+ */
+ if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E)
+ return ANV_FAST_CLEAR_DEFAULT_VALUE;
+ else
+ return ANV_FAST_CLEAR_NONE;
+ }
+}
+
static struct anv_state
alloc_surface_state(struct anv_device *device)
struct anv_surface_state *state_inout,
struct brw_image_param *image_param_out)
{
- const struct anv_surface *surface =
- anv_image_get_surface_for_aspect_mask(image, aspect);
+ uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
+
+ const struct anv_surface *surface = &image->planes[plane].surface,
+ *aux_surface = &image->planes[plane].aux_surface;
struct isl_view view = *view_in;
view.usage |= view_usage;
* the primary surface. The shadow surface will be tiled, unlike the main
* surface, so it should get significantly better performance.
*/
- if (image->shadow_surface.isl.size > 0 &&
+ if (image->planes[plane].shadow_surface.isl.size > 0 &&
isl_format_is_compressed(view.format) &&
(flags & ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL)) {
assert(isl_format_is_compressed(surface->isl.format));
assert(surface->isl.tiling == ISL_TILING_LINEAR);
- assert(image->shadow_surface.isl.tiling != ISL_TILING_LINEAR);
- surface = &image->shadow_surface;
+ assert(image->planes[plane].shadow_surface.isl.tiling != ISL_TILING_LINEAR);
+ surface = &image->planes[plane].shadow_surface;
}
if (view_usage == ISL_SURF_USAGE_RENDER_TARGET_BIT)
if (!clear_color)
clear_color = &default_clear_color;
- const uint64_t address = image->offset + surface->offset;
- const uint64_t aux_address = (aux_usage == ISL_AUX_USAGE_NONE) ? 0 :
- image->offset + image->aux_surface.offset;
+ const uint64_t address = image->planes[plane].bo_offset + surface->offset;
+ const uint64_t aux_address = aux_usage == ISL_AUX_USAGE_NONE ?
+ 0 : (image->planes[plane].bo_offset + aux_surface->offset);
if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
!(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY) &&
.view = &view,
.address = address + offset_B,
.clear_color = *clear_color,
- .aux_surf = &image->aux_surface.isl,
+ .aux_surf = &aux_surface->isl,
.aux_usage = aux_usage,
.aux_address = aux_address,
.mocs = device->default_mocs,
}
}
+static VkImageAspectFlags
+remap_aspect_flags(VkImageAspectFlags view_aspects)
+{
+ if (view_aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
+ if (_mesa_bitcount(view_aspects) == 1)
+ return VK_IMAGE_ASPECT_COLOR_BIT;
+
+ VkImageAspectFlags color_aspects = 0;
+ for (uint32_t i = 0; i < _mesa_bitcount(view_aspects); i++)
+ color_aspects |= VK_IMAGE_ASPECT_PLANE_0_BIT_KHR << i;
+ return color_aspects;
+ }
+ /* No special remapping needed for depth & stencil aspects. */
+ return view_aspects;
+}
+
VkResult
anv_CreateImageView(VkDevice _device,
const VkImageViewCreateInfo *pCreateInfo,
break;
}
+ /* First expand aspects to the image's ones (for example
+ * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
+ * VK_IMAGE_ASPECT_PLANE_0_BIT_KHR | VK_IMAGE_ASPECT_PLANE_1_BIT_KHR |
+ * VK_IMAGE_ASPECT_PLANE_2_BIT_KHR for an image of format
+ * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM_KHR.
+ */
+ VkImageAspectFlags expanded_aspects =
+ anv_image_expand_aspects(image, range->aspectMask);
+
iview->image = image;
- iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;
+ /* Remap the expanded aspects for the image view. For example if only
+ * VK_IMAGE_ASPECT_PLANE_1_BIT_KHR was given in range->aspectMask, we will
+ * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
+ * the image view, it only has a single plane.
+ */
+ iview->aspect_mask = remap_aspect_flags(expanded_aspects);
+ iview->n_planes = anv_image_aspect_get_planes(iview->aspect_mask);
iview->vk_format = pCreateInfo->format;
- struct anv_format_plane format =
- anv_get_format_plane(&device->info, pCreateInfo->format,
- range->aspectMask == (VK_IMAGE_ASPECT_DEPTH_BIT |
- VK_IMAGE_ASPECT_STENCIL_BIT) ?
- VK_IMAGE_ASPECT_DEPTH_BIT : range->aspectMask,
- image->tiling);
-
- iview->isl = (struct isl_view) {
- .format = format.isl_format,
- .base_level = range->baseMipLevel,
- .levels = anv_get_levelCount(image, range),
- .base_array_layer = range->baseArrayLayer,
- .array_len = anv_get_layerCount(image, range),
- .swizzle = {
- .r = remap_swizzle(pCreateInfo->components.r,
- VK_COMPONENT_SWIZZLE_R, format.swizzle),
- .g = remap_swizzle(pCreateInfo->components.g,
- VK_COMPONENT_SWIZZLE_G, format.swizzle),
- .b = remap_swizzle(pCreateInfo->components.b,
- VK_COMPONENT_SWIZZLE_B, format.swizzle),
- .a = remap_swizzle(pCreateInfo->components.a,
- VK_COMPONENT_SWIZZLE_A, format.swizzle),
- },
- };
-
iview->extent = (VkExtent3D) {
.width = anv_minify(image->extent.width , range->baseMipLevel),
.height = anv_minify(image->extent.height, range->baseMipLevel),
.depth = anv_minify(image->extent.depth , range->baseMipLevel),
};
- if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
- iview->isl.base_array_layer = 0;
- iview->isl.array_len = iview->extent.depth;
- }
+ /* Now go through the underlying image selected planes (computed in
+ * expanded_aspects) and map them to planes in the image view.
+ */
+ uint32_t iaspect_bit, vplane = 0;
+ anv_foreach_image_aspect_bit(iaspect_bit, image, expanded_aspects) {
+ uint32_t iplane =
+ anv_image_aspect_to_plane(expanded_aspects, 1UL << iaspect_bit);
+ VkImageAspectFlags vplane_aspect =
+ anv_plane_to_aspect(iview->aspect_mask, vplane);
+ struct anv_format_plane format =
+ anv_get_format_plane(&device->info, pCreateInfo->format,
+ vplane_aspect, image->tiling);
+
+ iview->planes[vplane].image_plane = iplane;
+
+ iview->planes[vplane].isl = (struct isl_view) {
+ .format = format.isl_format,
+ .base_level = range->baseMipLevel,
+ .levels = anv_get_levelCount(image, range),
+ .base_array_layer = range->baseArrayLayer,
+ .array_len = anv_get_layerCount(image, range),
+ .swizzle = {
+ .r = remap_swizzle(pCreateInfo->components.r,
+ VK_COMPONENT_SWIZZLE_R, format.swizzle),
+ .g = remap_swizzle(pCreateInfo->components.g,
+ VK_COMPONENT_SWIZZLE_G, format.swizzle),
+ .b = remap_swizzle(pCreateInfo->components.b,
+ VK_COMPONENT_SWIZZLE_B, format.swizzle),
+ .a = remap_swizzle(pCreateInfo->components.a,
+ VK_COMPONENT_SWIZZLE_A, format.swizzle),
+ },
+ };
+
+ if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
+ iview->planes[vplane].isl.base_array_layer = 0;
+ iview->planes[vplane].isl.array_len = iview->extent.depth;
+ }
- if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
- pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
- iview->isl.usage = ISL_SURF_USAGE_CUBE_BIT;
- } else {
- iview->isl.usage = 0;
- }
+ if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
+ pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
+ iview->planes[vplane].isl.usage = ISL_SURF_USAGE_CUBE_BIT;
+ } else {
+ iview->planes[vplane].isl.usage = 0;
+ }
- /* Input attachment surfaces for color are allocated and filled
- * out at BeginRenderPass time because they need compression information.
- * Compression is not yet enabled for depth textures and stencil doesn't
- * allow compression so we can just use the texture surface state from the
- * view.
- */
- if (view_usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
- (view_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
- !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
- iview->optimal_sampler_surface_state.state = alloc_surface_state(device);
- iview->general_sampler_surface_state.state = alloc_surface_state(device);
-
- enum isl_aux_usage general_aux_usage =
- anv_layout_to_aux_usage(&device->info, image, iview->aspect_mask,
- VK_IMAGE_LAYOUT_GENERAL);
- enum isl_aux_usage optimal_aux_usage =
- anv_layout_to_aux_usage(&device->info, image, iview->aspect_mask,
- VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
-
- anv_image_fill_surface_state(device, image, iview->aspect_mask,
- &iview->isl, ISL_SURF_USAGE_TEXTURE_BIT,
- optimal_aux_usage, NULL,
- ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL,
- &iview->optimal_sampler_surface_state,
- NULL);
-
- anv_image_fill_surface_state(device, image, iview->aspect_mask,
- &iview->isl, ISL_SURF_USAGE_TEXTURE_BIT,
- general_aux_usage, NULL,
- 0,
- &iview->general_sampler_surface_state,
- NULL);
- }
+ if (view_usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
+ (view_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
+ !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
+ iview->planes[vplane].optimal_sampler_surface_state.state = alloc_surface_state(device);
+ iview->planes[vplane].general_sampler_surface_state.state = alloc_surface_state(device);
+
+ enum isl_aux_usage general_aux_usage =
+ anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
+ VK_IMAGE_LAYOUT_GENERAL);
+ enum isl_aux_usage optimal_aux_usage =
+ anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
+ VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
+
+ anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
+ &iview->planes[vplane].isl,
+ ISL_SURF_USAGE_TEXTURE_BIT,
+ optimal_aux_usage, NULL,
+ ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL,
+ &iview->planes[vplane].optimal_sampler_surface_state,
+ NULL);
+
+ anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
+ &iview->planes[vplane].isl,
+ ISL_SURF_USAGE_TEXTURE_BIT,
+ general_aux_usage, NULL,
+ 0,
+ &iview->planes[vplane].general_sampler_surface_state,
+ NULL);
+ }
- /* NOTE: This one needs to go last since it may stomp isl_view.format */
- if (view_usage & VK_IMAGE_USAGE_STORAGE_BIT) {
- iview->storage_surface_state.state = alloc_surface_state(device);
- iview->writeonly_storage_surface_state.state = alloc_surface_state(device);
-
- anv_image_fill_surface_state(device, image, iview->aspect_mask,
- &iview->isl, ISL_SURF_USAGE_STORAGE_BIT,
- ISL_AUX_USAGE_NONE, NULL,
- 0,
- &iview->storage_surface_state,
- &iview->storage_image_param);
-
- anv_image_fill_surface_state(device, image, iview->aspect_mask,
- &iview->isl, ISL_SURF_USAGE_STORAGE_BIT,
- ISL_AUX_USAGE_NONE, NULL,
- ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY,
- &iview->writeonly_storage_surface_state,
- NULL);
+ /* NOTE: This one needs to go last since it may stomp isl_view.format */
+ if (view_usage & VK_IMAGE_USAGE_STORAGE_BIT) {
+ iview->planes[vplane].storage_surface_state.state = alloc_surface_state(device);
+ iview->planes[vplane].writeonly_storage_surface_state.state = alloc_surface_state(device);
+
+ anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
+ &iview->planes[vplane].isl,
+ ISL_SURF_USAGE_STORAGE_BIT,
+ ISL_AUX_USAGE_NONE, NULL,
+ 0,
+ &iview->planes[vplane].storage_surface_state,
+ &iview->planes[vplane].storage_image_param);
+
+ anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
+ &iview->planes[vplane].isl,
+ ISL_SURF_USAGE_STORAGE_BIT,
+ ISL_AUX_USAGE_NONE, NULL,
+ ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY,
+ &iview->planes[vplane].writeonly_storage_surface_state,
+ NULL);
+ }
+
+ vplane++;
}
*pView = anv_image_view_to_handle(iview);
if (!iview)
return;
- if (iview->optimal_sampler_surface_state.state.alloc_size > 0) {
- anv_state_pool_free(&device->surface_state_pool,
- iview->optimal_sampler_surface_state.state);
- }
+ for (uint32_t plane = 0; plane < iview->n_planes; plane++) {
+ if (iview->planes[plane].optimal_sampler_surface_state.state.alloc_size > 0) {
+ anv_state_pool_free(&device->surface_state_pool,
+ iview->planes[plane].optimal_sampler_surface_state.state);
+ }
- if (iview->general_sampler_surface_state.state.alloc_size > 0) {
- anv_state_pool_free(&device->surface_state_pool,
- iview->general_sampler_surface_state.state);
- }
+ if (iview->planes[plane].general_sampler_surface_state.state.alloc_size > 0) {
+ anv_state_pool_free(&device->surface_state_pool,
+ iview->planes[plane].general_sampler_surface_state.state);
+ }
- if (iview->storage_surface_state.state.alloc_size > 0) {
- anv_state_pool_free(&device->surface_state_pool,
- iview->storage_surface_state.state);
- }
+ if (iview->planes[plane].storage_surface_state.state.alloc_size > 0) {
+ anv_state_pool_free(&device->surface_state_pool,
+ iview->planes[plane].storage_surface_state.state);
+ }
- if (iview->writeonly_storage_surface_state.state.alloc_size > 0) {
- anv_state_pool_free(&device->surface_state_pool,
- iview->writeonly_storage_surface_state.state);
+ if (iview->planes[plane].writeonly_storage_surface_state.state.alloc_size > 0) {
+ anv_state_pool_free(&device->surface_state_pool,
+ iview->planes[plane].writeonly_storage_surface_state.state);
+ }
}
vk_free2(&device->alloc, pAllocator, iview);
anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
VkImageAspectFlags aspect_mask)
{
+ VkImageAspectFlags sanitized_mask;
+
switch (aspect_mask) {
case VK_IMAGE_ASPECT_COLOR_BIT:
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
- return &image->color_surface;
+ sanitized_mask = VK_IMAGE_ASPECT_COLOR_BIT;
+ break;
case VK_IMAGE_ASPECT_DEPTH_BIT:
assert(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT);
- return &image->depth_surface;
+ sanitized_mask = VK_IMAGE_ASPECT_DEPTH_BIT;
+ break;
case VK_IMAGE_ASPECT_STENCIL_BIT:
assert(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
- return &image->stencil_surface;
+ sanitized_mask = VK_IMAGE_ASPECT_STENCIL_BIT;
+ break;
case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
/* FINISHME: The Vulkan spec (git a511ba2) requires support for
* combined depth stencil formats. Specifically, it states:
* stencil surfaces from the underlying surface.
*/
if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
- return &image->depth_surface;
+ sanitized_mask = VK_IMAGE_ASPECT_DEPTH_BIT;
} else {
assert(image->aspects == VK_IMAGE_ASPECT_STENCIL_BIT);
- return &image->stencil_surface;
+ sanitized_mask = VK_IMAGE_ASPECT_STENCIL_BIT;
}
- default:
+ break;
+ case VK_IMAGE_ASPECT_PLANE_0_BIT_KHR:
+ assert((image->aspects & ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
+ sanitized_mask = VK_IMAGE_ASPECT_PLANE_0_BIT_KHR;
+ break;
+ case VK_IMAGE_ASPECT_PLANE_1_BIT_KHR:
+ assert((image->aspects & ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
+ sanitized_mask = VK_IMAGE_ASPECT_PLANE_1_BIT_KHR;
+ break;
+ case VK_IMAGE_ASPECT_PLANE_2_BIT_KHR:
+ assert((image->aspects & ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
+ sanitized_mask = VK_IMAGE_ASPECT_PLANE_2_BIT_KHR;
+ break;
+ default:
unreachable("image does not have aspect");
return NULL;
}
+
+ uint32_t plane = anv_image_aspect_to_plane(image->aspects, sanitized_mask);
+ return &image->planes[plane].surface;
}
projects / mesa.git / blobdiff