case VK_IMAGE_TILING_LINEAR:
flags = ISL_TILING_LINEAR_BIT;
break;
+ case VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT:
+ assert(isl_mod_info);
+ flags = 1 << isl_mod_info->tiling;
}
if (anv_info->isl_tiling_flags)
if (legacy_scanout)
flags &= ISL_TILING_LINEAR_BIT | ISL_TILING_X_BIT;
- if (isl_mod_info)
- flags &= 1 << isl_mod_info->tiling;
-
assert(flags);
return flags;
}
-static bool
-all_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
- const VkImageFormatListCreateInfoKHR *fmt_list,
- struct anv_image *image)
+bool
+anv_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
+ VkImageCreateFlags create_flags,
+ VkFormat vk_format,
+ VkImageTiling vk_tiling,
+ const VkImageFormatListCreateInfoKHR *fmt_list)
{
enum isl_format format =
- anv_get_isl_format(devinfo, image->vk_format,
- VK_IMAGE_ASPECT_COLOR_BIT, image->tiling);
+ anv_get_isl_format(devinfo, vk_format,
+ VK_IMAGE_ASPECT_COLOR_BIT, vk_tiling);
if (!isl_format_supports_ccs_e(devinfo, format))
return false;
- if (!(image->create_flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT))
+ if (!(create_flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT))
return true;
if (!fmt_list || fmt_list->viewFormatCount == 0)
for (uint32_t i = 0; i < fmt_list->viewFormatCount; i++) {
enum isl_format view_format =
anv_get_isl_format(devinfo, fmt_list->pViewFormats[i],
- VK_IMAGE_ASPECT_COLOR_BIT, image->tiling);
+ VK_IMAGE_ASPECT_COLOR_BIT, vk_tiling);
if (!isl_formats_are_ccs_e_compatible(devinfo, format, view_format))
return false;
const struct anv_device *device)
{
assert(image && device);
- assert(image->planes[plane].aux_surface.isl.size_B > 0 &&
+ assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
/* Compressed images must be tiled and therefore everything should be 4K
}
}
+ /* Add some padding to make sure the fast clear color state buffer starts at
+ * a 4K alignment. We believe that 256B might be enough, but due to lack of
+ * testing we will leave this as 4K for now.
+ */
+ image->planes[plane].size = ALIGN(image->planes[plane].size, 4096);
+ image->size = ALIGN(image->size, 4096);
+
+ assert(image->planes[plane].offset % 4096 == 0);
+
image->planes[plane].fast_clear_state_offset =
image->planes[plane].offset + image->planes[plane].size;
* image's memory requirements (that is, the image's size and alignment).
*/
static VkResult
-make_surface(const struct anv_device *dev,
+make_surface(struct anv_device *device,
struct anv_image *image,
+ const VkImageFormatListCreateInfoKHR *fmt_list,
uint32_t stride,
isl_tiling_flags_t tiling_flags,
isl_surf_usage_flags_t isl_extra_usage_flags,
const unsigned plane = anv_image_aspect_to_plane(image->aspects, aspect);
const struct anv_format_plane plane_format =
- anv_get_format_plane(&dev->info, image->vk_format, aspect, image->tiling);
+ anv_get_format_plane(&device->info, image->vk_format, aspect, image->tiling);
struct anv_surface *anv_surf = &image->planes[plane].surface;
const isl_surf_usage_flags_t usage =
* just use RENDER_SURFACE_STATE::X/Y Offset.
*/
bool needs_shadow = false;
- if (dev->info.gen <= 8 &&
+ isl_surf_usage_flags_t shadow_usage = 0;
+ if (device->info.gen <= 8 &&
(image->create_flags & VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT) &&
image->tiling == VK_IMAGE_TILING_OPTIMAL) {
assert(isl_format_is_compressed(plane_format.isl_format));
tiling_flags = ISL_TILING_LINEAR_BIT;
needs_shadow = true;
+ shadow_usage = ISL_SURF_USAGE_TEXTURE_BIT |
+ (usage & ISL_SURF_USAGE_CUBE_BIT);
}
- ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
+ if (device->info.gen <= 7 &&
+ aspect == VK_IMAGE_ASPECT_STENCIL_BIT &&
+ (image->stencil_usage & VK_IMAGE_USAGE_SAMPLED_BIT)) {
+ needs_shadow = true;
+ shadow_usage = ISL_SURF_USAGE_TEXTURE_BIT |
+ (usage & ISL_SURF_USAGE_CUBE_BIT);
+ }
+
+ ok = isl_surf_init(&device->isl_dev, &anv_surf->isl,
.dim = vk_to_isl_surf_dim[image->type],
.format = plane_format.isl_format,
.width = image->extent.width / plane_format.denominator_scales[0],
/* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
* create an identical tiled shadow surface for use while texturing so we
- * don't get garbage performance.
+ * don't get garbage performance. If we're on gen7 and the image contains
+ * stencil, then we need to maintain a shadow because we can't texture from
+ * W-tiled images.
*/
if (needs_shadow) {
- assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
- assert(tiling_flags == ISL_TILING_LINEAR_BIT);
-
- ok = isl_surf_init(&dev->isl_dev, &image->planes[plane].shadow_surface.isl,
+ ok = isl_surf_init(&device->isl_dev, &image->planes[plane].shadow_surface.isl,
.dim = vk_to_isl_surf_dim[image->type],
.format = plane_format.isl_format,
.width = image->extent.width,
.samples = image->samples,
.min_alignment_B = 0,
.row_pitch_B = stride,
- .usage = usage,
+ .usage = shadow_usage,
.tiling_flags = ISL_TILING_ANY_MASK);
/* isl_surf_init() will fail only if provided invalid input. Invalid input
*/
if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
/* It will never be used as an attachment, HiZ is pointless. */
- } else if (dev->info.gen == 7) {
- anv_perf_warn(dev->instance, image, "Implement gen7 HiZ");
+ } else if (device->info.gen == 7) {
+ anv_perf_warn(device, image, "Implement gen7 HiZ");
} else if (image->levels > 1) {
- anv_perf_warn(dev->instance, image, "Enable multi-LOD HiZ");
+ anv_perf_warn(device, image, "Enable multi-LOD HiZ");
} else if (image->array_size > 1) {
- anv_perf_warn(dev->instance, image,
+ anv_perf_warn(device, image,
"Implement multi-arrayLayer HiZ clears and resolves");
- } else if (dev->info.gen == 8 && image->samples > 1) {
- anv_perf_warn(dev->instance, image, "Enable gen8 multisampled HiZ");
+ } else if (device->info.gen == 8 && image->samples > 1) {
+ anv_perf_warn(device, image, "Enable gen8 multisampled HiZ");
} else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
assert(image->planes[plane].aux_surface.isl.size_B == 0);
- ok = isl_surf_get_hiz_surf(&dev->isl_dev,
+ ok = isl_surf_get_hiz_surf(&device->isl_dev,
&image->planes[plane].surface.isl,
&image->planes[plane].aux_surface.isl);
assert(ok);
- add_surface(image, &image->planes[plane].aux_surface, plane);
image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
+ add_surface(image, &image->planes[plane].aux_surface, plane);
}
} else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples == 1) {
/* TODO: Disallow compression with :
if (allow_compression) {
assert(image->planes[plane].aux_surface.isl.size_B == 0);
- ok = isl_surf_get_ccs_surf(&dev->isl_dev,
+ ok = isl_surf_get_ccs_surf(&device->isl_dev,
&image->planes[plane].surface.isl,
- &image->planes[plane].aux_surface.isl, 0);
+ &image->planes[plane].aux_surface.isl,
+ NULL, 0);
if (ok) {
/* Disable CCS when it is not useful (i.e., when you can't render
* to the image with CCS enabled).
*/
- if (!isl_format_supports_rendering(&dev->info,
+ if (!isl_format_supports_rendering(&device->info,
plane_format.isl_format)) {
/* While it may be technically possible to enable CCS for this
* image, we currently don't have things hooked up to get it
* working.
*/
- anv_perf_warn(dev->instance, image,
+ anv_perf_warn(device, image,
"This image format doesn't support rendering. "
"Not allocating an CCS buffer.");
image->planes[plane].aux_surface.isl.size_B = 0;
return VK_SUCCESS;
}
- add_surface(image, &image->planes[plane].aux_surface, plane);
- add_aux_state_tracking_buffer(image, plane, dev);
-
/* For images created without MUTABLE_FORMAT_BIT set, we know that
* they will always be used with the original format. In
* particular, they will always be used with a format that
* compression on at all times for these formats.
*/
if (!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
- image->ccs_e_compatible) {
+ anv_formats_ccs_e_compatible(&device->info,
+ image->create_flags,
+ image->vk_format,
+ image->tiling,
+ fmt_list)) {
image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
+ } else if (device->info.gen >= 12) {
+ anv_perf_warn(device, image,
+ "The CCS_D aux mode is not yet handled on "
+ "Gen12+. Not allocating a CCS buffer.");
+ image->planes[plane].aux_surface.isl.size_B = 0;
+ return VK_SUCCESS;
+ } else {
+ image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_D;
}
+
+ if (!device->physical->has_implicit_ccs)
+ add_surface(image, &image->planes[plane].aux_surface, plane);
+
+ add_aux_state_tracking_buffer(image, plane, device);
}
}
} else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples > 1) {
assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
assert(image->planes[plane].aux_surface.isl.size_B == 0);
- ok = isl_surf_get_mcs_surf(&dev->isl_dev,
+ ok = isl_surf_get_mcs_surf(&device->isl_dev,
&image->planes[plane].surface.isl,
&image->planes[plane].aux_surface.isl);
if (ok) {
- add_surface(image, &image->planes[plane].aux_surface, plane);
- add_aux_state_tracking_buffer(image, plane, dev);
image->planes[plane].aux_usage = ISL_AUX_USAGE_MCS;
+ add_surface(image, &image->planes[plane].aux_surface, plane);
+ add_aux_state_tracking_buffer(image, plane, device);
}
}
image->planes[plane].surface.isl.size_B)) <=
(image->planes[plane].offset + image->planes[plane].size));
- if (image->planes[plane].aux_surface.isl.size_B) {
+ if (image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE) {
/* assert(image->planes[plane].fast_clear_state_offset == */
/* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
assert(image->planes[plane].fast_clear_state_offset <
const struct wsi_image_create_info *wsi_info =
vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
- if (wsi_info && wsi_info->modifier_count > 0) {
- isl_mod_info = choose_drm_format_mod(&device->instance->physicalDevice,
- wsi_info->modifier_count,
- wsi_info->modifiers);
+
+ if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
+ const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
+ vk_find_struct_const(pCreateInfo->pNext,
+ IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
+ isl_mod_info = choose_drm_format_mod(device->physical,
+ mod_info->drmFormatModifierCount,
+ mod_info->pDrmFormatModifiers);
assert(isl_mod_info);
}
image->drm_format_mod = isl_mod_info ? isl_mod_info->modifier :
DRM_FORMAT_MOD_INVALID;
+ if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
+ image->stencil_usage = pCreateInfo->usage;
+ const VkImageStencilUsageCreateInfoEXT *stencil_usage_info =
+ vk_find_struct_const(pCreateInfo->pNext,
+ IMAGE_STENCIL_USAGE_CREATE_INFO_EXT);
+ if (stencil_usage_info)
+ image->stencil_usage = stencil_usage_info->stencilUsage;
+ }
+
/* In case of external format, We don't know format yet,
* so skip the rest for now.
*/
vk_find_struct_const(pCreateInfo->pNext,
IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
- image->ccs_e_compatible =
- all_formats_ccs_e_compatible(&device->info, fmt_list, image);
-
uint32_t b;
for_each_bit(b, image->aspects) {
- r = make_surface(device, image, create_info->stride, isl_tiling_flags,
- create_info->isl_extra_usage_flags, (1 << b));
+ r = make_surface(device, image, fmt_list, create_info->stride,
+ isl_tiling_flags, create_info->isl_extra_usage_flags,
+ (1 << b));
if (r != VK_SUCCESS)
goto fail;
}
local_create_info.usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
/* If the image has a particular modifier, specify that modifier. */
- struct wsi_image_create_info local_wsi_info = {
- .sType = VK_STRUCTURE_TYPE_WSI_IMAGE_CREATE_INFO_MESA,
- .modifier_count = 1,
- .modifiers = &swapchain_image->drm_format_mod,
+ VkImageDrmFormatModifierListCreateInfoEXT local_modifier_info = {
+ .sType = VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT,
+ .drmFormatModifierCount = 1,
+ .pDrmFormatModifiers = &swapchain_image->drm_format_mod,
};
if (swapchain_image->drm_format_mod != DRM_FORMAT_MOD_INVALID)
- __vk_append_struct(&local_create_info, &local_wsi_info);
+ __vk_append_struct(&local_create_info, &local_modifier_info);
return anv_image_create(device,
&(struct anv_image_create_info) {
const VkAllocationCallbacks *pAllocator,
VkImage *pImage)
{
- const struct VkExternalMemoryImageCreateInfo *create_info =
+ const VkExternalMemoryImageCreateInfo *create_info =
vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_MEMORY_IMAGE_CREATE_INFO);
if (create_info && (create_info->handleTypes &
return anv_image_from_external(device, pCreateInfo, create_info,
pAllocator, pImage);
+ bool use_external_format = false;
+ const VkExternalFormatANDROID *ext_format =
+ vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_FORMAT_ANDROID);
+
+ /* "If externalFormat is zero, the effect is as if the
+ * VkExternalFormatANDROID structure was not present. Otherwise, the image
+ * will have the specified external format."
+ */
+ if (ext_format && ext_format->externalFormat != 0)
+ use_external_format = true;
+
const VkNativeBufferANDROID *gralloc_info =
vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
if (gralloc_info)
return anv_image_create(device,
&(struct anv_image_create_info) {
.vk_info = pCreateInfo,
+ .external_format = use_external_format,
},
pAllocator,
pImage);
for (uint32_t p = 0; p < image->n_planes; ++p) {
if (image->planes[p].bo_is_owned) {
assert(image->planes[p].address.bo != NULL);
- anv_bo_cache_release(device, &device->bo_cache,
- image->planes[p].address.bo);
+ anv_device_release_bo(device, image->planes[p].address.bo);
}
}
.bo = memory->bo,
.offset = memory_offset,
};
+
+ /* If we're on a platform that uses implicit CCS and our buffer does not
+ * have any implicit CCS data, disable compression on that image.
+ */
+ if (device->physical->has_implicit_ccs && !memory->bo->has_implicit_ccs)
+ image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
}
/* We are binding AHardwareBuffer. Get a description, resolve the
vk_tiling == VK_IMAGE_TILING_OPTIMAL);
/* Check format. */
- VkFormat vk_format = vk_format_from_android(desc.format);
+ VkFormat vk_format = vk_format_from_android(desc.format, desc.usage);
enum isl_format isl_fmt = anv_get_isl_format(&device->info,
vk_format,
VK_IMAGE_ASPECT_COLOR_BIT,
vk_tiling);
- assert(format != ISL_FORMAT_UNSUPPORTED);
+ assert(isl_fmt != ISL_FORMAT_UNSUPPORTED);
/* Handle RGB(X)->RGBA fallback. */
switch (desc.format) {
image->format = anv_get_format(vk_format);
image->aspects = vk_format_aspects(image->vk_format);
image->n_planes = image->format->n_planes;
- image->ccs_e_compatible = false;
uint32_t stride = desc.stride *
(isl_format_get_layout(isl_fmt)->bpb / 8);
uint32_t b;
for_each_bit(b, image->aspects) {
- VkResult r = make_surface(device, image, stride, isl_tiling_flags,
+ VkResult r = make_surface(device, image, NULL, stride, isl_tiling_flags,
ISL_SURF_USAGE_DISABLE_AUX_BIT, (1 << b));
assert(r == VK_SUCCESS);
}
}
}
+VkResult anv_GetImageDrmFormatModifierPropertiesEXT(
+ VkDevice device,
+ VkImage _image,
+ VkImageDrmFormatModifierPropertiesEXT* pProperties)
+{
+ ANV_FROM_HANDLE(anv_image, image, _image);
+
+ assert(pProperties->sType ==
+ VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
+
+ pProperties->drmFormatModifier = image->drm_format_mod;
+
+ return VK_SUCCESS;
+}
+
/**
- * This function determines the optimal buffer to use for a given
- * VkImageLayout and other pieces of information needed to make that
- * determination. This does not determine the optimal buffer to use
- * during a resolve operation.
+ * This function returns the assumed isl_aux_state for a given VkImageLayout.
+ * Because Vulkan image layouts don't map directly to isl_aux_state enums, the
+ * returned enum is the assumed worst case.
*
* @param devinfo The device information of the Intel GPU.
* @param image The image that may contain a collection of buffers.
*
* @return The primary buffer that should be used for the given layout.
*/
-enum isl_aux_usage
-anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
+enum isl_aux_state
+anv_layout_to_aux_state(const struct gen_device_info * const devinfo,
const struct anv_image * const image,
const VkImageAspectFlagBits aspect,
const VkImageLayout layout)
uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
- /* If there is no auxiliary surface allocated, we must use the one and only
- * main buffer.
- */
- if (image->planes[plane].aux_surface.isl.size_B == 0)
- return ISL_AUX_USAGE_NONE;
+ /* If we don't have an aux buffer then aux state makes no sense */
+ assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE);
/* All images that use an auxiliary surface are required to be tiled. */
- assert(image->tiling == VK_IMAGE_TILING_OPTIMAL);
+ assert(image->planes[plane].surface.isl.tiling != ISL_TILING_LINEAR);
/* Stencil has no aux */
assert(aspect != VK_IMAGE_ASPECT_STENCIL_BIT);
switch (layout) {
-
- /* Invalid Layouts */
+ /* Invalid layouts */
case VK_IMAGE_LAYOUT_RANGE_SIZE:
case VK_IMAGE_LAYOUT_MAX_ENUM:
unreachable("Invalid image layout.");
*/
case VK_IMAGE_LAYOUT_UNDEFINED:
case VK_IMAGE_LAYOUT_PREINITIALIZED:
- return ISL_AUX_USAGE_NONE;
+ return ISL_AUX_STATE_AUX_INVALID;
-
- /* Transfer Layouts
- */
+ /* Transfer layouts */
case VK_IMAGE_LAYOUT_GENERAL:
case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
- case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
/* This buffer could be a depth buffer used in a transfer operation.
* BLORP currently doesn't use HiZ for transfer operations so we must
* use the main buffer for this layout. TODO: Enable HiZ in BLORP.
*/
assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ);
- return ISL_AUX_USAGE_NONE;
+ return ISL_AUX_STATE_AUX_INVALID;
+ } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D) {
+ return ISL_AUX_STATE_PASS_THROUGH;
} else {
- assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
- return image->planes[plane].aux_usage;
+ return ISL_AUX_STATE_COMPRESSED_CLEAR;
}
-
- /* Sampling Layouts */
+ /* Sampling layouts */
+ case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR:
case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
assert((image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
/* Fall-through */
+ case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
if (anv_can_sample_with_hiz(devinfo, image))
- return ISL_AUX_USAGE_HIZ;
+ return ISL_AUX_STATE_COMPRESSED_CLEAR;
else
- return ISL_AUX_USAGE_NONE;
+ return ISL_AUX_STATE_RESOLVED;
+ } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D) {
+ return ISL_AUX_STATE_PASS_THROUGH;
} else {
- return image->planes[plane].aux_usage;
+ return ISL_AUX_STATE_COMPRESSED_CLEAR;
}
+ case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR:
+ return ISL_AUX_STATE_RESOLVED;
case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR: {
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
*/
const struct isl_drm_modifier_info *mod_info =
isl_drm_modifier_get_info(image->drm_format_mod);
- return mod_info ? mod_info->aux_usage : ISL_AUX_USAGE_NONE;
+ if (mod_info && mod_info->aux_usage != ISL_AUX_USAGE_NONE) {
+ assert(mod_info->aux_usage == ISL_AUX_USAGE_CCS_E);
+ assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E);
+ /* We do not yet support any modifiers which support clear color so
+ * we just always return COMPRESSED_NO_CLEAR. One day, this will
+ * change.
+ */
+ assert(!mod_info->supports_clear_color);
+ return ISL_AUX_STATE_COMPRESSED_NO_CLEAR;
+ } else {
+ return ISL_AUX_STATE_PASS_THROUGH;
+ }
}
-
- /* Rendering Layouts */
+ /* Rendering layouts */
case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
assert(aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
- if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE) {
- assert(image->samples == 1);
- return ISL_AUX_USAGE_CCS_D;
+ /* fall-through */
+ case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR:
+ if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D) {
+ return ISL_AUX_STATE_PARTIAL_CLEAR;
} else {
- assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_CCS_D);
- return image->planes[plane].aux_usage;
+ return ISL_AUX_STATE_COMPRESSED_CLEAR;
}
+ case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR:
case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
assert(aspect == VK_IMAGE_ASPECT_DEPTH_BIT);
- return ISL_AUX_USAGE_HIZ;
+ return ISL_AUX_STATE_COMPRESSED_CLEAR;
case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
unreachable("VK_KHR_shared_presentable_image is unsupported");
unreachable("VK_NV_shading_rate_image is unsupported");
}
- /* If the layout isn't recognized in the exhaustive switch above, the
- * VkImageLayout value is not defined in vulkan.h.
- */
unreachable("layout is not a VkImageLayout enumeration member.");
}
+ASSERTED static bool
+vk_image_layout_is_read_only(VkImageLayout layout,
+ VkImageAspectFlagBits aspect)
+{
+ assert(util_bitcount(aspect) == 1);
+
+ switch (layout) {
+ case VK_IMAGE_LAYOUT_UNDEFINED:
+ case VK_IMAGE_LAYOUT_PREINITIALIZED:
+ return true; /* These are only used for layout transitions */
+
+ case VK_IMAGE_LAYOUT_GENERAL:
+ case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
+ case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
+ case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
+ case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
+ case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR:
+ case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR:
+ return false;
+
+ case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
+ case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
+ case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
+ case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
+ case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV:
+ case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT:
+ case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR:
+ case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR:
+ return true;
+
+ case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
+ return aspect == VK_IMAGE_ASPECT_DEPTH_BIT;
+
+ case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
+ return aspect == VK_IMAGE_ASPECT_STENCIL_BIT;
+
+ case VK_IMAGE_LAYOUT_RANGE_SIZE:
+ case VK_IMAGE_LAYOUT_MAX_ENUM:
+ unreachable("Invalid image layout.");
+ }
+
+ unreachable("Invalid image layout.");
+}
+
+/**
+ * This function determines the optimal buffer to use for a given
+ * VkImageLayout and other pieces of information needed to make that
+ * determination. This does not determine the optimal buffer to use
+ * during a resolve operation.
+ *
+ * @param devinfo The device information of the Intel GPU.
+ * @param image The image that may contain a collection of buffers.
+ * @param aspect The aspect of the image to be accessed.
+ * @param usage The usage which describes how the image will be accessed.
+ * @param layout The current layout of the image aspect(s).
+ *
+ * @return The primary buffer that should be used for the given layout.
+ */
+enum isl_aux_usage
+anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
+ const struct anv_image * const image,
+ const VkImageAspectFlagBits aspect,
+ const VkImageUsageFlagBits usage,
+ const VkImageLayout layout)
+{
+ uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
+
+ /* If there is no auxiliary surface allocated, we must use the one and only
+ * main buffer.
+ */
+ if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
+ return ISL_AUX_USAGE_NONE;
+
+ enum isl_aux_state aux_state =
+ anv_layout_to_aux_state(devinfo, image, aspect, layout);
+
+ switch (aux_state) {
+ case ISL_AUX_STATE_CLEAR:
+ unreachable("We never use this state");
+
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
+ assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
+ assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D);
+ assert(image->samples == 1);
+ return ISL_AUX_USAGE_CCS_D;
+
+ case ISL_AUX_STATE_COMPRESSED_CLEAR:
+ case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
+ if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
+ return ISL_AUX_USAGE_HIZ;
+ } else {
+ assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE);
+ return image->planes[plane].aux_usage;
+ }
+
+ case ISL_AUX_STATE_RESOLVED:
+ /* We can only use RESOLVED in read-only layouts because any write will
+ * either land us in AUX_INVALID or COMPRESSED_NO_CLEAR. We can do
+ * writes in PASS_THROUGH without destroying it so that is allowed.
+ */
+ assert(vk_image_layout_is_read_only(layout, aspect));
+ assert(util_is_power_of_two_or_zero(usage));
+ if (usage == VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) {
+ /* If we have valid HiZ data and are using the image as a read-only
+ * depth/stencil attachment, we should enable HiZ so that we can get
+ * faster depth testing.
+ */
+ return ISL_AUX_USAGE_HIZ;
+ } else {
+ return ISL_AUX_USAGE_NONE;
+ }
+
+ case ISL_AUX_STATE_PASS_THROUGH:
+ case ISL_AUX_STATE_AUX_INVALID:
+ return ISL_AUX_USAGE_NONE;
+ }
+
+ unreachable("Invalid isl_aux_state");
+}
+
/**
* This function returns the level of unresolved fast-clear support of the
* given image in the given VkImageLayout.
* @param devinfo The device information of the Intel GPU.
* @param image The image that may contain a collection of buffers.
* @param aspect The aspect of the image to be accessed.
+ * @param usage The usage which describes how the image will be accessed.
* @param layout The current layout of the image aspect(s).
*/
enum anv_fast_clear_type
const VkImageAspectFlagBits aspect,
const VkImageLayout layout)
{
- /* The aspect must be exactly one of the image aspects. */
- assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
+ if (INTEL_DEBUG & DEBUG_NO_FAST_CLEAR)
+ return ANV_FAST_CLEAR_NONE;
uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
/* If there is no auxiliary surface allocated, there are no fast-clears */
- if (image->planes[plane].aux_surface.isl.size_B == 0)
+ if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
return ANV_FAST_CLEAR_NONE;
- /* All images that use an auxiliary surface are required to be tiled. */
- assert(image->tiling == VK_IMAGE_TILING_OPTIMAL);
-
- /* Stencil has no aux */
- assert(aspect != VK_IMAGE_ASPECT_STENCIL_BIT);
-
- if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
- /* For depth images (with HiZ), the layout supports fast-clears if and
- * only if it supports HiZ. However, we only support fast-clears to the
- * default depth value.
- */
- enum isl_aux_usage aux_usage =
- anv_layout_to_aux_usage(devinfo, image, aspect, layout);
- return aux_usage == ISL_AUX_USAGE_HIZ ?
- ANV_FAST_CLEAR_DEFAULT_VALUE : ANV_FAST_CLEAR_NONE;
- }
-
- assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
-
/* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
* lack the MI ALU which we need to determine the predicates.
*/
if (devinfo->gen == 7 && !devinfo->is_haswell && image->samples > 1)
return ANV_FAST_CLEAR_NONE;
- switch (layout) {
- case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
- return ANV_FAST_CLEAR_ANY;
+ enum isl_aux_state aux_state =
+ anv_layout_to_aux_state(devinfo, image, aspect, layout);
- case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR: {
- assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
-#ifndef NDEBUG
- /* We do not yet support any modifiers which support clear color so we
- * just always return NONE. One day, this will change.
- */
- const struct isl_drm_modifier_info *mod_info =
- isl_drm_modifier_get_info(image->drm_format_mod);
- assert(!mod_info || !mod_info->supports_clear_color);
-#endif
- return ANV_FAST_CLEAR_NONE;
- }
+ switch (aux_state) {
+ case ISL_AUX_STATE_CLEAR:
+ unreachable("We never use this state");
- default:
- /* If the image has MCS or CCS_E enabled all the time then we can use
- * fast-clear as long as the clear color is the default value of zero
- * since this is the default value we program into every surface state
- * used for texturing.
- */
- if (image->planes[plane].aux_usage == ISL_AUX_USAGE_MCS ||
- image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E)
+ case ISL_AUX_STATE_PARTIAL_CLEAR:
+ case ISL_AUX_STATE_COMPRESSED_CLEAR:
+ if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
+ return ANV_FAST_CLEAR_DEFAULT_VALUE;
+ } else if (layout == VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL) {
+ /* When we're in a render pass we have the clear color data from the
+ * VkRenderPassBeginInfo and we can use arbitrary clear colors. They
+ * must get partially resolved before we leave the render pass.
+ */
+ return ANV_FAST_CLEAR_ANY;
+ } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_MCS ||
+ image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
+ /* If the image has MCS or CCS_E enabled all the time then we can use
+ * fast-clear as long as the clear color is the default value of zero
+ * since this is the default value we program into every surface
+ * state used for texturing.
+ */
return ANV_FAST_CLEAR_DEFAULT_VALUE;
- else
+ } else {
return ANV_FAST_CLEAR_NONE;
+ }
+
+ case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
+ case ISL_AUX_STATE_RESOLVED:
+ case ISL_AUX_STATE_PASS_THROUGH:
+ case ISL_AUX_STATE_AUX_INVALID:
+ return ANV_FAST_CLEAR_NONE;
}
+
+ unreachable("Invalid isl_aux_state");
}
surface = &image->planes[plane].shadow_surface;
}
+ /* For texturing from stencil on gen7, we have to sample from a shadow
+ * surface because we don't support W-tiling in the sampler.
+ */
+ if (image->planes[plane].shadow_surface.isl.size_B > 0 &&
+ aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
+ assert(device->info.gen == 7);
+ assert(view_usage & ISL_SURF_USAGE_TEXTURE_BIT);
+ surface = &image->planes[plane].shadow_surface;
+ }
+
if (view_usage == ISL_SURF_USAGE_RENDER_TARGET_BIT)
view.swizzle = anv_swizzle_for_render(view.swizzle);
*/
const struct isl_format_layout *fmtl =
isl_format_get_layout(surface->isl.format);
+ tmp_surf.logical_level0_px =
+ isl_surf_get_logical_level0_el(&tmp_surf);
+ tmp_surf.phys_level0_sa = isl_surf_get_phys_level0_el(&tmp_surf);
tmp_surf.format = view.format;
- tmp_surf.logical_level0_px.width =
- DIV_ROUND_UP(tmp_surf.logical_level0_px.width, fmtl->bw);
- tmp_surf.logical_level0_px.height =
- DIV_ROUND_UP(tmp_surf.logical_level0_px.height, fmtl->bh);
- tmp_surf.phys_level0_sa.width /= fmtl->bw;
- tmp_surf.phys_level0_sa.height /= fmtl->bh;
tile_x_sa /= fmtl->bw;
tile_y_sa /= fmtl->bh;
if (device->info.gen >= 10 && aux_usage != ISL_AUX_USAGE_NONE) {
if (aux_usage == ISL_AUX_USAGE_HIZ) {
clear_address = (struct anv_address) {
- .bo = &device->hiz_clear_bo,
+ .bo = device->hiz_clear_bo,
.offset = 0,
};
} else {
/* Check if a conversion info was passed. */
const struct anv_format *conv_format = NULL;
- const struct VkSamplerYcbcrConversionInfo *conv_info =
+ const VkSamplerYcbcrConversionInfo *conv_info =
vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
/* If image has an external format, the pNext chain must contain an instance of
conv_format = conversion->format;
}
+ VkImageUsageFlags image_usage = 0;
+ if (range->aspectMask & ~VK_IMAGE_ASPECT_STENCIL_BIT)
+ image_usage |= image->usage;
+ if (range->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT)
+ image_usage |= image->stencil_usage;
+
const VkImageViewUsageCreateInfo *usage_info =
vk_find_struct_const(pCreateInfo, IMAGE_VIEW_USAGE_CREATE_INFO);
- VkImageUsageFlags view_usage = usage_info ? usage_info->usage : image->usage;
+ VkImageUsageFlags view_usage = usage_info ? usage_info->usage : image_usage;
+
/* View usage should be a subset of image usage */
- assert((view_usage & ~image->usage) == 0);
+ assert((view_usage & ~image_usage) == 0);
assert(view_usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
VK_IMAGE_USAGE_STORAGE_BIT |
VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
enum isl_aux_usage general_aux_usage =
anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
+ VK_IMAGE_USAGE_SAMPLED_BIT,
VK_IMAGE_LAYOUT_GENERAL);
enum isl_aux_usage optimal_aux_usage =
anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
+ VK_IMAGE_USAGE_SAMPLED_BIT,
VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
vk_free2(&device->alloc, pAllocator, view);
}
-
-const struct anv_surface *
-anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
- VkImageAspectFlags aspect_mask)
-{
- VkImageAspectFlags sanitized_mask;
-
- switch (aspect_mask) {
- case VK_IMAGE_ASPECT_COLOR_BIT:
- assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
- sanitized_mask = VK_IMAGE_ASPECT_COLOR_BIT;
- break;
- case VK_IMAGE_ASPECT_DEPTH_BIT:
- assert(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT);
- sanitized_mask = VK_IMAGE_ASPECT_DEPTH_BIT;
- break;
- case VK_IMAGE_ASPECT_STENCIL_BIT:
- assert(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
- sanitized_mask = VK_IMAGE_ASPECT_STENCIL_BIT;
- break;
- case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
- /* FINISHME: The Vulkan spec (git a511ba2) requires support for
- * combined depth stencil formats. Specifically, it states:
- *
- * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
- * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
- *
- * Image views with both depth and stencil aspects are only valid for
- * render target attachments, in which case
- * cmd_buffer_emit_depth_stencil() will pick out both the depth and
- * stencil surfaces from the underlying surface.
- */
- if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
- sanitized_mask = VK_IMAGE_ASPECT_DEPTH_BIT;
- } else {
- assert(image->aspects == VK_IMAGE_ASPECT_STENCIL_BIT);
- sanitized_mask = VK_IMAGE_ASPECT_STENCIL_BIT;
- }
- break;
- case VK_IMAGE_ASPECT_PLANE_0_BIT:
- assert((image->aspects & ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
- sanitized_mask = VK_IMAGE_ASPECT_PLANE_0_BIT;
- break;
- case VK_IMAGE_ASPECT_PLANE_1_BIT:
- assert((image->aspects & ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
- sanitized_mask = VK_IMAGE_ASPECT_PLANE_1_BIT;
- break;
- case VK_IMAGE_ASPECT_PLANE_2_BIT:
- assert((image->aspects & ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
- sanitized_mask = VK_IMAGE_ASPECT_PLANE_2_BIT;
- break;
- default:
- unreachable("image does not have aspect");
- return NULL;
- }
-
- uint32_t plane = anv_image_aspect_to_plane(image->aspects, sanitized_mask);
- return &image->planes[plane].surface;
-}
projects / mesa.git / blobdiff