anv: Get rid of a bunch of uses of size_t

[mesa.git] / src / intel / vulkan / anv_nir_apply_pipeline_layout.c

diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 02991bef273b28c385cb41a44a0243f42b1d39f6..67bcf5e29ef1dd6bc4ae15730cc1bd2d45323085 100644 (file)
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -346,6 +346,35 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
       }
    }
 
+   nir_foreach_variable(var, &shader->uniforms) {
+      if (!glsl_type_is_image(var->interface_type))
+         continue;
+
+      enum glsl_sampler_dim dim = glsl_get_sampler_dim(var->interface_type);
+
+      const uint32_t set = var->data.descriptor_set;
+      const uint32_t binding = var->data.binding;
+      const uint32_t array_size =
+         layout->set[set].layout->binding[binding].array_size;
+
+      if (!BITSET_TEST(state.set[set].used, binding))
+         continue;
+
+      struct anv_pipeline_binding *pipe_binding =
+         &map->surface_to_descriptor[state.set[set].surface_offsets[binding]];
+      for (unsigned i = 0; i < array_size; i++) {
+         assert(pipe_binding[i].set == set);
+         assert(pipe_binding[i].binding == binding);
+         assert(pipe_binding[i].index == i);
+
+         if (dim == GLSL_SAMPLER_DIM_SUBPASS ||
+             dim == GLSL_SAMPLER_DIM_SUBPASS_MS)
+            pipe_binding[i].input_attachment_index = var->data.index + i;
+
+         pipe_binding[i].write_only = var->data.image.write_only;
+      }
+   }
+
    nir_foreach_function(function, shader) {
       if (!function->impl)
          continue;