nir_intrinsic_binding(intrin));
break;
- case nir_intrinsic_image_load:
- case nir_intrinsic_image_store:
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap:
- case nir_intrinsic_image_size:
- case nir_intrinsic_image_samples:
+ case nir_intrinsic_image_var_load:
+ case nir_intrinsic_image_var_store:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap:
+ case nir_intrinsic_image_var_size:
+ case nir_intrinsic_image_var_samples:
add_var_binding(state, intrin->variables[0]->var);
break;
uint32_t array_size =
state->layout->set[set].layout->binding[binding].array_size;
- nir_ssa_def *block_index = nir_ssa_for_src(b, intrin->src[0], 1);
+ nir_const_value *const_array_index = nir_src_as_const_value(intrin->src[0]);
- if (state->add_bounds_checks)
- block_index = nir_umin(b, block_index, nir_imm_int(b, array_size - 1));
+ nir_ssa_def *block_index;
+ if (const_array_index) {
+ unsigned array_index = const_array_index->u32[0];
+ array_index = MIN2(array_index, array_size - 1);
+ block_index = nir_imm_int(b, surface_index + array_index);
+ } else {
+ block_index = nir_ssa_for_src(b, intrin->src[0], 1);
- block_index = nir_iadd(b, nir_imm_int(b, surface_index), block_index);
+ if (state->add_bounds_checks)
+ block_index = nir_umin(b, block_index, nir_imm_int(b, array_size - 1));
+
+ block_index = nir_iadd(b, nir_imm_int(b, surface_index), block_index);
+ }
assert(intrin->dest.is_ssa);
nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(block_index));
nir_instr_remove(&intrin->instr);
}
+static void
+lower_res_reindex_intrinsic(nir_intrinsic_instr *intrin,
+ struct apply_pipeline_layout_state *state)
+{
+ nir_builder *b = &state->builder;
+
+ /* For us, the resource indices are just indices into the binding table and
+ * array elements are sequential. A resource_reindex just turns into an
+ * add of the two indices.
+ */
+ assert(intrin->src[0].is_ssa && intrin->src[1].is_ssa);
+ nir_ssa_def *new_index = nir_iadd(b, intrin->src[0].ssa,
+ intrin->src[1].ssa);
+
+ assert(intrin->dest.is_ssa);
+ nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(new_index));
+ nir_instr_remove(&intrin->instr);
+}
+
static void
lower_tex_deref(nir_tex_instr *tex, nir_deref_var *deref,
unsigned *const_index, unsigned array_size,
if (state->add_bounds_checks)
index = nir_umin(b, index, nir_imm_int(b, array_size - 1));
- nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src,
- tex->num_srcs + 1);
-
- for (unsigned i = 0; i < tex->num_srcs; i++) {
- new_srcs[i].src_type = tex->src[i].src_type;
- nir_instr_move_src(&tex->instr, &new_srcs[i].src, &tex->src[i].src);
- }
-
- ralloc_free(tex->src);
- tex->src = new_srcs;
-
- /* Now we can go ahead and move the source over to being a
- * first-class texture source.
- */
- tex->src[tex->num_srcs].src_type = src_type;
- nir_instr_rewrite_src(&tex->instr, &tex->src[tex->num_srcs].src,
- nir_src_for_ssa(index));
- tex->num_srcs++;
+ nir_tex_instr_add_src(tex, src_type, nir_src_for_ssa(index));
} else {
*const_index += MIN2(deref_array->base_offset, array_size - 1);
}
static uint32_t
extract_tex_src_plane(nir_tex_instr *tex)
{
- nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src, tex->num_srcs - 1);
unsigned plane = 0;
- for (unsigned i = 0, w = 0; i < tex->num_srcs; i++) {
+ int plane_src_idx = -1;
+ for (unsigned i = 0; i < tex->num_srcs; i++) {
if (tex->src[i].src_type == nir_tex_src_plane) {
nir_const_value *const_plane =
nir_src_as_const_value(tex->src[i].src);
* constants. */
assert(const_plane);
plane = const_plane->u32[0];
-
- /* Remove the source from the instruction */
- nir_instr_rewrite_src(&tex->instr, &tex->src[i].src, NIR_SRC_INIT);
- } else {
- new_srcs[w].src_type = tex->src[i].src_type;
- nir_instr_move_src(&tex->instr, &new_srcs[w].src, &tex->src[i].src);
- w++;
+ plane_src_idx = i;
}
}
- ralloc_free(tex->src);
- tex->src = new_srcs;
- tex->num_srcs--;
+ assert(plane_src_idx >= 0);
+ nir_tex_instr_remove_src(tex, plane_src_idx);
return plane;
}
switch (instr->type) {
case nir_instr_type_intrinsic: {
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
- if (intrin->intrinsic == nir_intrinsic_vulkan_resource_index) {
+ switch (intrin->intrinsic) {
+ case nir_intrinsic_vulkan_resource_index:
lower_res_index_intrinsic(intrin, state);
+ break;
+ case nir_intrinsic_vulkan_resource_reindex:
+ lower_res_reindex_intrinsic(intrin, state);
+ break;
+ default:
+ break;
}
break;
}
}
static void
-setup_vec4_uniform_value(const union gl_constant_value **params,
- const union gl_constant_value *values,
- unsigned n)
+setup_vec4_uniform_value(uint32_t *params, uint32_t offset, unsigned n)
{
- static const gl_constant_value zero = { 0 };
-
for (unsigned i = 0; i < n; ++i)
- params[i] = &values[i];
+ params[i] = ANV_PARAM_PUSH(offset + i * sizeof(uint32_t));
for (unsigned i = n; i < 4; ++i)
- params[i] = &zero;
+ params[i] = BRW_PARAM_BUILTIN_ZERO;
}
void
anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
+ struct anv_pipeline_layout *layout,
nir_shader *shader,
struct brw_stage_prog_data *prog_data,
struct anv_pipeline_bind_map *map)
{
- struct anv_pipeline_layout *layout = pipeline->layout;
+ gl_shader_stage stage = shader->info.stage;
struct apply_pipeline_layout_state state = {
.shader = shader,
BITSET_WORD b, _tmp;
BITSET_FOREACH_SET(b, _tmp, state.set[set].used,
set_layout->binding_count) {
- if (set_layout->binding[b].stage[shader->stage].surface_index >= 0) {
+ if (set_layout->binding[b].stage[stage].surface_index >= 0) {
map->surface_count +=
anv_descriptor_set_binding_layout_get_hw_size(&set_layout->binding[b]);
}
- if (set_layout->binding[b].stage[shader->stage].sampler_index >= 0) {
+ if (set_layout->binding[b].stage[stage].sampler_index >= 0) {
map->sampler_count +=
anv_descriptor_set_binding_layout_get_hw_size(&set_layout->binding[b]);
}
- if (set_layout->binding[b].stage[shader->stage].image_index >= 0)
+ if (set_layout->binding[b].stage[stage].image_index >= 0)
map->image_count += set_layout->binding[b].array_size;
}
}
struct anv_descriptor_set_binding_layout *binding =
&set_layout->binding[b];
- if (binding->stage[shader->stage].surface_index >= 0) {
+ if (binding->stage[stage].surface_index >= 0) {
state.set[set].surface_offsets[b] = surface;
struct anv_sampler **samplers = binding->immutable_samplers;
for (unsigned i = 0; i < binding->array_size; i++) {
}
}
- if (binding->stage[shader->stage].sampler_index >= 0) {
+ if (binding->stage[stage].sampler_index >= 0) {
state.set[set].sampler_offsets[b] = sampler;
struct anv_sampler **samplers = binding->immutable_samplers;
for (unsigned i = 0; i < binding->array_size; i++) {
}
}
- if (binding->stage[shader->stage].image_index >= 0) {
+ if (binding->stage[stage].image_index >= 0) {
state.set[set].image_offsets[b] = image;
image += binding->array_size;
}
}
}
+ uint32_t *param = brw_stage_prog_data_add_params(prog_data,
+ map->image_count *
+ BRW_IMAGE_PARAM_SIZE);
struct anv_push_constants *null_data = NULL;
- const gl_constant_value **param =
- prog_data->param + (shader->num_uniforms / 4);
const struct brw_image_param *image_param = null_data->images;
for (uint32_t i = 0; i < map->image_count; i++) {
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SURFACE_IDX_OFFSET,
- (const union gl_constant_value *)&image_param->surface_idx, 1);
+ (uintptr_t)&image_param->surface_idx, 1);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_OFFSET_OFFSET,
- (const union gl_constant_value *)image_param->offset, 2);
+ (uintptr_t)image_param->offset, 2);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SIZE_OFFSET,
- (const union gl_constant_value *)image_param->size, 3);
+ (uintptr_t)image_param->size, 3);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_STRIDE_OFFSET,
- (const union gl_constant_value *)image_param->stride, 4);
+ (uintptr_t)image_param->stride, 4);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_TILING_OFFSET,
- (const union gl_constant_value *)image_param->tiling, 3);
+ (uintptr_t)image_param->tiling, 3);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SWIZZLING_OFFSET,
- (const union gl_constant_value *)image_param->swizzling, 2);
+ (uintptr_t)image_param->swizzling, 2);
param += BRW_IMAGE_PARAM_SIZE;
image_param ++;
}
+ assert(param == prog_data->param + prog_data->nr_params);
shader->num_uniforms += map->image_count * BRW_IMAGE_PARAM_SIZE * 4;
}