nir_shader *shader;
nir_builder builder;
+ struct anv_pipeline_layout *layout;
+ bool add_bounds_checks;
+
struct {
BITSET_WORD *used;
uint8_t *surface_offsets;
add_binding(state, var->data.descriptor_set, var->data.binding);
}
-static bool
-get_used_bindings_block(nir_block *block, void *void_state)
+static void
+get_used_bindings_block(nir_block *block,
+ struct apply_pipeline_layout_state *state)
{
- struct apply_pipeline_layout_state *state = void_state;
-
- nir_foreach_instr_safe(block, instr) {
+ nir_foreach_instr_safe(instr, block) {
switch (instr->type) {
case nir_instr_type_intrinsic: {
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
nir_intrinsic_binding(intrin));
break;
- case nir_intrinsic_image_load:
- case nir_intrinsic_image_store:
- case nir_intrinsic_image_atomic_add:
- case nir_intrinsic_image_atomic_min:
- case nir_intrinsic_image_atomic_max:
- case nir_intrinsic_image_atomic_and:
- case nir_intrinsic_image_atomic_or:
- case nir_intrinsic_image_atomic_xor:
- case nir_intrinsic_image_atomic_exchange:
- case nir_intrinsic_image_atomic_comp_swap:
- case nir_intrinsic_image_size:
- case nir_intrinsic_image_samples:
+ case nir_intrinsic_image_var_load:
+ case nir_intrinsic_image_var_store:
+ case nir_intrinsic_image_var_atomic_add:
+ case nir_intrinsic_image_var_atomic_min:
+ case nir_intrinsic_image_var_atomic_max:
+ case nir_intrinsic_image_var_atomic_and:
+ case nir_intrinsic_image_var_atomic_or:
+ case nir_intrinsic_image_var_atomic_xor:
+ case nir_intrinsic_image_var_atomic_exchange:
+ case nir_intrinsic_image_var_atomic_comp_swap:
+ case nir_intrinsic_image_var_size:
+ case nir_intrinsic_image_var_samples:
add_var_binding(state, intrin->variables[0]->var);
break;
continue;
}
}
-
- return true;
}
static void
uint32_t binding = nir_intrinsic_binding(intrin);
uint32_t surface_index = state->set[set].surface_offsets[binding];
+ uint32_t array_size =
+ state->layout->set[set].layout->binding[binding].array_size;
- nir_const_value *const_block_idx =
- nir_src_as_const_value(intrin->src[0]);
+ nir_const_value *const_array_index = nir_src_as_const_value(intrin->src[0]);
nir_ssa_def *block_index;
- if (const_block_idx) {
- block_index = nir_imm_int(b, surface_index + const_block_idx->u32[0]);
+ if (const_array_index) {
+ unsigned array_index = const_array_index->u32[0];
+ array_index = MIN2(array_index, array_size - 1);
+ block_index = nir_imm_int(b, surface_index + array_index);
} else {
- block_index = nir_iadd(b, nir_imm_int(b, surface_index),
- nir_ssa_for_src(b, intrin->src[0], 1));
+ block_index = nir_ssa_for_src(b, intrin->src[0], 1);
+
+ if (state->add_bounds_checks)
+ block_index = nir_umin(b, block_index, nir_imm_int(b, array_size - 1));
+
+ block_index = nir_iadd(b, nir_imm_int(b, surface_index), block_index);
}
assert(intrin->dest.is_ssa);
nir_instr_remove(&intrin->instr);
}
+static void
+lower_res_reindex_intrinsic(nir_intrinsic_instr *intrin,
+ struct apply_pipeline_layout_state *state)
+{
+ nir_builder *b = &state->builder;
+
+ /* For us, the resource indices are just indices into the binding table and
+ * array elements are sequential. A resource_reindex just turns into an
+ * add of the two indices.
+ */
+ assert(intrin->src[0].is_ssa && intrin->src[1].is_ssa);
+ nir_ssa_def *new_index = nir_iadd(b, intrin->src[0].ssa,
+ intrin->src[1].ssa);
+
+ assert(intrin->dest.is_ssa);
+ nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(new_index));
+ nir_instr_remove(&intrin->instr);
+}
+
static void
lower_tex_deref(nir_tex_instr *tex, nir_deref_var *deref,
- unsigned *const_index, nir_tex_src_type src_type,
+ unsigned *const_index, unsigned array_size,
+ nir_tex_src_type src_type, bool allow_indirect,
struct apply_pipeline_layout_state *state)
{
+ nir_builder *b = &state->builder;
+
if (deref->deref.child) {
assert(deref->deref.child->deref_type == nir_deref_type_array);
nir_deref_array *deref_array = nir_deref_as_array(deref->deref.child);
- *const_index += deref_array->base_offset;
-
if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
- nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src,
- tex->num_srcs + 1);
+ /* From VK_KHR_sampler_ycbcr_conversion:
+ *
+ * If sampler Y’CBCR conversion is enabled, the combined image
+ * sampler must be indexed only by constant integral expressions when
+ * aggregated into arrays in shader code, irrespective of the
+ * shaderSampledImageArrayDynamicIndexing feature.
+ */
+ assert(allow_indirect);
- for (unsigned i = 0; i < tex->num_srcs; i++) {
- new_srcs[i].src_type = tex->src[i].src_type;
- nir_instr_move_src(&tex->instr, &new_srcs[i].src, &tex->src[i].src);
- }
+ nir_ssa_def *index =
+ nir_iadd(b, nir_imm_int(b, deref_array->base_offset),
+ nir_ssa_for_src(b, deref_array->indirect, 1));
- ralloc_free(tex->src);
- tex->src = new_srcs;
+ if (state->add_bounds_checks)
+ index = nir_umin(b, index, nir_imm_int(b, array_size - 1));
- /* Now we can go ahead and move the source over to being a
- * first-class texture source.
- */
- tex->src[tex->num_srcs].src_type = src_type;
- tex->num_srcs++;
- assert(deref_array->indirect.is_ssa);
- nir_instr_rewrite_src(&tex->instr, &tex->src[tex->num_srcs - 1].src,
- deref_array->indirect);
+ nir_tex_instr_add_src(tex, src_type, nir_src_for_ssa(index));
+ } else {
+ *const_index += MIN2(deref_array->base_offset, array_size - 1);
}
}
}
nir_instr_rewrite_src(&tex->instr, &deref_array->indirect, NIR_SRC_INIT);
}
+static bool
+has_tex_src_plane(nir_tex_instr *tex)
+{
+ for (unsigned i = 0; i < tex->num_srcs; i++) {
+ if (tex->src[i].src_type == nir_tex_src_plane)
+ return true;
+ }
+
+ return false;
+}
+
+static uint32_t
+extract_tex_src_plane(nir_tex_instr *tex)
+{
+ unsigned plane = 0;
+
+ int plane_src_idx = -1;
+ for (unsigned i = 0; i < tex->num_srcs; i++) {
+ if (tex->src[i].src_type == nir_tex_src_plane) {
+ nir_const_value *const_plane =
+ nir_src_as_const_value(tex->src[i].src);
+
+ /* Our color conversion lowering pass should only ever insert
+ * constants. */
+ assert(const_plane);
+ plane = const_plane->u32[0];
+ plane_src_idx = i;
+ }
+ }
+
+ assert(plane_src_idx >= 0);
+ nir_tex_instr_remove_src(tex, plane_src_idx);
+
+ return plane;
+}
+
static void
lower_tex(nir_tex_instr *tex, struct apply_pipeline_layout_state *state)
{
/* No one should have come by and lowered it already */
assert(tex->texture);
+ state->builder.cursor = nir_before_instr(&tex->instr);
+
unsigned set = tex->texture->var->data.descriptor_set;
unsigned binding = tex->texture->var->data.binding;
+ unsigned array_size =
+ state->layout->set[set].layout->binding[binding].array_size;
+ bool has_plane = has_tex_src_plane(tex);
+ unsigned plane = has_plane ? extract_tex_src_plane(tex) : 0;
+
tex->texture_index = state->set[set].surface_offsets[binding];
- lower_tex_deref(tex, tex->texture, &tex->texture_index,
- nir_tex_src_texture_offset, state);
+ lower_tex_deref(tex, tex->texture, &tex->texture_index, array_size,
+ nir_tex_src_texture_offset, !has_plane, state);
+ tex->texture_index += plane;
if (tex->sampler) {
unsigned set = tex->sampler->var->data.descriptor_set;
unsigned binding = tex->sampler->var->data.binding;
+ unsigned array_size =
+ state->layout->set[set].layout->binding[binding].array_size;
tex->sampler_index = state->set[set].sampler_offsets[binding];
- lower_tex_deref(tex, tex->sampler, &tex->sampler_index,
- nir_tex_src_sampler_offset, state);
+ lower_tex_deref(tex, tex->sampler, &tex->sampler_index, array_size,
+ nir_tex_src_sampler_offset, !has_plane, state);
+ tex->sampler_index += plane;
}
/* The backend only ever uses this to mark used surfaces. We don't care
tex->sampler = NULL;
}
-static bool
-apply_pipeline_layout_block(nir_block *block, void *void_state)
+static void
+apply_pipeline_layout_block(nir_block *block,
+ struct apply_pipeline_layout_state *state)
{
- struct apply_pipeline_layout_state *state = void_state;
-
- nir_foreach_instr_safe(block, instr) {
+ nir_foreach_instr_safe(instr, block) {
switch (instr->type) {
case nir_instr_type_intrinsic: {
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
- if (intrin->intrinsic == nir_intrinsic_vulkan_resource_index) {
+ switch (intrin->intrinsic) {
+ case nir_intrinsic_vulkan_resource_index:
lower_res_index_intrinsic(intrin, state);
+ break;
+ case nir_intrinsic_vulkan_resource_reindex:
+ lower_res_reindex_intrinsic(intrin, state);
+ break;
+ default:
+ break;
}
break;
}
continue;
}
}
-
- return true;
}
static void
-setup_vec4_uniform_value(const union gl_constant_value **params,
- const union gl_constant_value *values,
- unsigned n)
+setup_vec4_uniform_value(uint32_t *params, uint32_t offset, unsigned n)
{
- static const gl_constant_value zero = { 0 };
-
for (unsigned i = 0; i < n; ++i)
- params[i] = &values[i];
+ params[i] = ANV_PARAM_PUSH(offset + i * sizeof(uint32_t));
for (unsigned i = n; i < 4; ++i)
- params[i] = &zero;
+ params[i] = BRW_PARAM_BUILTIN_ZERO;
}
void
anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
+ struct anv_pipeline_layout *layout,
nir_shader *shader,
struct brw_stage_prog_data *prog_data,
struct anv_pipeline_bind_map *map)
{
- struct anv_pipeline_layout *layout = pipeline->layout;
+ gl_shader_stage stage = shader->info.stage;
struct apply_pipeline_layout_state state = {
.shader = shader,
+ .layout = layout,
+ .add_bounds_checks = pipeline->device->robust_buffer_access,
};
void *mem_ctx = ralloc_context(NULL);
state.set[s].image_offsets = rzalloc_array(mem_ctx, uint8_t, count);
}
- nir_foreach_function(shader, function) {
- if (function->impl)
- nir_foreach_block(function->impl, get_used_bindings_block, &state);
+ nir_foreach_function(function, shader) {
+ if (!function->impl)
+ continue;
+
+ nir_foreach_block(block, function->impl)
+ get_used_bindings_block(block, &state);
}
for (uint32_t set = 0; set < layout->num_sets; set++) {
BITSET_WORD b, _tmp;
BITSET_FOREACH_SET(b, _tmp, state.set[set].used,
set_layout->binding_count) {
- if (set_layout->binding[b].stage[shader->stage].surface_index >= 0)
- map->surface_count += set_layout->binding[b].array_size;
- if (set_layout->binding[b].stage[shader->stage].sampler_index >= 0)
- map->sampler_count += set_layout->binding[b].array_size;
- if (set_layout->binding[b].stage[shader->stage].image_index >= 0)
+ if (set_layout->binding[b].stage[stage].surface_index >= 0) {
+ map->surface_count +=
+ anv_descriptor_set_binding_layout_get_hw_size(&set_layout->binding[b]);
+ }
+ if (set_layout->binding[b].stage[stage].sampler_index >= 0) {
+ map->sampler_count +=
+ anv_descriptor_set_binding_layout_get_hw_size(&set_layout->binding[b]);
+ }
+ if (set_layout->binding[b].stage[stage].image_index >= 0)
map->image_count += set_layout->binding[b].array_size;
}
}
BITSET_WORD b, _tmp;
BITSET_FOREACH_SET(b, _tmp, state.set[set].used,
set_layout->binding_count) {
- unsigned array_size = set_layout->binding[b].array_size;
- unsigned set_offset = set_layout->binding[b].descriptor_index;
+ struct anv_descriptor_set_binding_layout *binding =
+ &set_layout->binding[b];
- if (set_layout->binding[b].stage[shader->stage].surface_index >= 0) {
+ if (binding->stage[stage].surface_index >= 0) {
state.set[set].surface_offsets[b] = surface;
- for (unsigned i = 0; i < array_size; i++) {
- map->surface_to_descriptor[surface + i].set = set;
- map->surface_to_descriptor[surface + i].offset = set_offset + i;
+ struct anv_sampler **samplers = binding->immutable_samplers;
+ for (unsigned i = 0; i < binding->array_size; i++) {
+ uint8_t planes = samplers ? samplers[i]->n_planes : 1;
+ for (uint8_t p = 0; p < planes; p++) {
+ map->surface_to_descriptor[surface].set = set;
+ map->surface_to_descriptor[surface].binding = b;
+ map->surface_to_descriptor[surface].index = i;
+ map->surface_to_descriptor[surface].plane = p;
+ surface++;
+ }
}
- surface += array_size;
}
- if (set_layout->binding[b].stage[shader->stage].sampler_index >= 0) {
+ if (binding->stage[stage].sampler_index >= 0) {
state.set[set].sampler_offsets[b] = sampler;
- for (unsigned i = 0; i < array_size; i++) {
- map->sampler_to_descriptor[sampler + i].set = set;
- map->sampler_to_descriptor[sampler + i].offset = set_offset + i;
+ struct anv_sampler **samplers = binding->immutable_samplers;
+ for (unsigned i = 0; i < binding->array_size; i++) {
+ uint8_t planes = samplers ? samplers[i]->n_planes : 1;
+ for (uint8_t p = 0; p < planes; p++) {
+ map->sampler_to_descriptor[sampler].set = set;
+ map->sampler_to_descriptor[sampler].binding = b;
+ map->sampler_to_descriptor[sampler].index = i;
+ map->sampler_to_descriptor[sampler].plane = p;
+ sampler++;
+ }
}
- sampler += array_size;
}
- if (set_layout->binding[b].stage[shader->stage].image_index >= 0) {
+ if (binding->stage[stage].image_index >= 0) {
state.set[set].image_offsets[b] = image;
- image += array_size;
+ image += binding->array_size;
}
}
}
- nir_foreach_function(shader, function) {
- if (function->impl) {
- nir_builder_init(&state.builder, function->impl);
- nir_foreach_block(function->impl, apply_pipeline_layout_block, &state);
- nir_metadata_preserve(function->impl, nir_metadata_block_index |
- nir_metadata_dominance);
+ nir_foreach_variable(var, &shader->uniforms) {
+ if (!glsl_type_is_image(var->interface_type))
+ continue;
+
+ enum glsl_sampler_dim dim = glsl_get_sampler_dim(var->interface_type);
+
+ const uint32_t set = var->data.descriptor_set;
+ const uint32_t binding = var->data.binding;
+ const uint32_t array_size =
+ layout->set[set].layout->binding[binding].array_size;
+
+ if (!BITSET_TEST(state.set[set].used, binding))
+ continue;
+
+ struct anv_pipeline_binding *pipe_binding =
+ &map->surface_to_descriptor[state.set[set].surface_offsets[binding]];
+ for (unsigned i = 0; i < array_size; i++) {
+ assert(pipe_binding[i].set == set);
+ assert(pipe_binding[i].binding == binding);
+ assert(pipe_binding[i].index == i);
+
+ if (dim == GLSL_SAMPLER_DIM_SUBPASS ||
+ dim == GLSL_SAMPLER_DIM_SUBPASS_MS)
+ pipe_binding[i].input_attachment_index = var->data.index + i;
+
+ pipe_binding[i].write_only = var->data.image.write_only;
}
}
+ nir_foreach_function(function, shader) {
+ if (!function->impl)
+ continue;
+
+ nir_builder_init(&state.builder, function->impl);
+ nir_foreach_block(block, function->impl)
+ apply_pipeline_layout_block(block, &state);
+ nir_metadata_preserve(function->impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+ }
+
if (map->image_count > 0) {
assert(map->image_count <= MAX_IMAGES);
nir_foreach_variable(var, &shader->uniforms) {
}
}
+ uint32_t *param = brw_stage_prog_data_add_params(prog_data,
+ map->image_count *
+ BRW_IMAGE_PARAM_SIZE);
struct anv_push_constants *null_data = NULL;
- const gl_constant_value **param =
- prog_data->param + (shader->num_uniforms / 4);
const struct brw_image_param *image_param = null_data->images;
for (uint32_t i = 0; i < map->image_count; i++) {
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SURFACE_IDX_OFFSET,
- (const union gl_constant_value *)&image_param->surface_idx, 1);
+ (uintptr_t)&image_param->surface_idx, 1);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_OFFSET_OFFSET,
- (const union gl_constant_value *)image_param->offset, 2);
+ (uintptr_t)image_param->offset, 2);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SIZE_OFFSET,
- (const union gl_constant_value *)image_param->size, 3);
+ (uintptr_t)image_param->size, 3);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_STRIDE_OFFSET,
- (const union gl_constant_value *)image_param->stride, 4);
+ (uintptr_t)image_param->stride, 4);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_TILING_OFFSET,
- (const union gl_constant_value *)image_param->tiling, 3);
+ (uintptr_t)image_param->tiling, 3);
setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SWIZZLING_OFFSET,
- (const union gl_constant_value *)image_param->swizzling, 2);
+ (uintptr_t)image_param->swizzling, 2);
param += BRW_IMAGE_PARAM_SIZE;
image_param ++;
}
+ assert(param == prog_data->param + prog_data->nr_params);
shader->num_uniforms += map->image_count * BRW_IMAGE_PARAM_SIZE * 4;
}
projects / mesa.git / blobdiff