* IN THE SOFTWARE.
*/
-#pragma once
+#ifndef ANV_PRIVATE_H
+#define ANV_PRIVATE_H
#include <stdlib.h>
#include <stdio.h>
#define VG(x)
#endif
-#include "common/brw_device_info.h"
+#include "common/gen_device_info.h"
+#include "blorp/blorp.h"
#include "brw_compiler.h"
#include "util/macros.h"
#include "util/list.h"
typedef uint32_t xcb_visualid_t;
typedef uint32_t xcb_window_t;
-struct anv_l3_config;
+struct gen_l3_config;
#include <vulkan/vulkan.h>
#include <vulkan/vulkan_intel.h>
gl_shader_stage stage,
unsigned per_thread_scratch);
-void *anv_resolve_entrypoint(uint32_t index);
-
extern struct anv_dispatch_table dtable;
-#define ANV_CALL(func) ({ \
- if (dtable.func == NULL) { \
- size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
- dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
- } \
- dtable.func; \
-})
-
static inline void *
anv_alloc(const VkAllocationCallbacks *alloc,
size_t size, size_t align,
uint32_t chipset_id;
char path[20];
const char * name;
- const struct brw_device_info * info;
+ struct gen_device_info info;
uint64_t aperture_size;
struct brw_compiler * compiler;
struct isl_device isl_dev;
int cmd_parser_version;
+ uint32_t eu_total;
+ uint32_t subslice_total;
+
struct anv_wsi_interface * wsi[VK_ICD_WSI_PLATFORM_MAX];
};
VkResult anv_init_wsi(struct anv_physical_device *physical_device);
void anv_finish_wsi(struct anv_physical_device *physical_device);
-struct anv_meta_state {
- VkAllocationCallbacks alloc;
-
- /**
- * Use array element `i` for images with `2^i` samples.
- */
- struct {
- /**
- * Pipeline N is used to clear color attachment N of the current
- * subpass.
- *
- * HACK: We use one pipeline per color attachment to work around the
- * compiler's inability to dynamically set the render target index of
- * the render target write message.
- */
- struct anv_pipeline *color_pipelines[MAX_RTS];
-
- struct anv_pipeline *depth_only_pipeline;
- struct anv_pipeline *stencil_only_pipeline;
- struct anv_pipeline *depthstencil_pipeline;
- } clear[1 + MAX_SAMPLES_LOG2];
-
- struct {
- VkRenderPass render_pass;
-
- /** Pipeline that blits from a 1D image. */
- VkPipeline pipeline_1d_src;
-
- /** Pipeline that blits from a 2D image. */
- VkPipeline pipeline_2d_src;
-
- /** Pipeline that blits from a 3D image. */
- VkPipeline pipeline_3d_src;
-
- VkPipelineLayout pipeline_layout;
- VkDescriptorSetLayout ds_layout;
- } blit;
-
- struct {
- VkRenderPass render_pass;
-
- VkPipelineLayout img_p_layout;
- VkDescriptorSetLayout img_ds_layout;
- VkPipelineLayout buf_p_layout;
- VkDescriptorSetLayout buf_ds_layout;
-
- /* Pipelines indexed by source and destination type. See the
- * blit2d_src_type and blit2d_dst_type enums in anv_meta_blit2d.c to
- * see what these mean.
- */
- VkPipeline pipelines[2][3];
- } blit2d;
-
- struct {
- /** Pipeline [i] resolves an image with 2^(i+1) samples. */
- VkPipeline pipelines[MAX_SAMPLES_LOG2];
-
- VkRenderPass pass;
- VkPipelineLayout pipeline_layout;
- VkDescriptorSetLayout ds_layout;
- } resolve;
-};
-
struct anv_queue {
VK_LOADER_DATA _loader_data;
struct anv_instance * instance;
uint32_t chipset_id;
- struct brw_device_info info;
+ struct gen_device_info info;
struct isl_device isl_dev;
int context_id;
int fd;
struct anv_bo workaround_bo;
- struct anv_meta_state meta_state;
+ struct anv_pipeline_cache blorp_shader_cache;
+ struct blorp_context blorp;
struct anv_state border_colors;
void anv_device_get_cache_uuid(void *uuid);
+void anv_device_init_blorp(struct anv_device *device);
+void anv_device_finish_blorp(struct anv_device *device);
void* anv_gem_mmap(struct anv_device *device,
uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
uint32_t offset;
};
-#define __gen_address_type struct anv_address
-#define __gen_user_data struct anv_batch
-
static inline uint64_t
-__gen_combine_address(struct anv_batch *batch, void *location,
- const struct anv_address address, uint32_t delta)
+_anv_combine_address(struct anv_batch *batch, void *location,
+ const struct anv_address address, uint32_t delta)
{
if (address.bo == NULL) {
return address.offset + delta;
}
}
+#define __gen_address_type struct anv_address
+#define __gen_user_data struct anv_batch
+#define __gen_combine_address _anv_combine_address
+
/* Wrapper macros needed to work around preprocessor argument issues. In
* particular, arguments don't get pre-evaluated if they are concatenated.
* This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
struct anv_cmd_state {
/* PIPELINE_SELECT.PipelineSelection */
uint32_t current_pipeline;
- const struct anv_l3_config * current_l3_config;
+ const struct gen_l3_config * current_l3_config;
uint32_t vb_dirty;
anv_cmd_dirty_mask_t dirty;
anv_cmd_dirty_mask_t compute_dirty;
struct anv_cmd_buffer *secondary);
void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
+VkResult anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer);
+
VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
unsigned stage, struct anv_state *bt_state);
VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
const VkRenderPassBeginInfo *info);
-void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
- struct anv_subpass *subpass);
-
struct anv_state
anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
gl_shader_stage stage);
struct anv_state state;
};
-struct nir_shader;
-
struct anv_shader_module {
- struct nir_shader * nir;
-
unsigned char sha1[20];
uint32_t size;
char data[0];
struct anv_pipeline_layout * layout;
- bool use_repclear;
bool needs_data_cache;
struct anv_shader_bin * shaders[MESA_SHADER_STAGES];
struct {
- uint32_t start[MESA_SHADER_GEOMETRY + 1];
- uint32_t size[MESA_SHADER_GEOMETRY + 1];
- uint32_t entries[MESA_SHADER_GEOMETRY + 1];
- const struct anv_l3_config * l3_config;
+ const struct gen_l3_config * l3_config;
uint32_t total_size;
} urb;
ANV_DECL_GET_PROG_DATA_FUNC(wm, MESA_SHADER_FRAGMENT)
ANV_DECL_GET_PROG_DATA_FUNC(cs, MESA_SHADER_COMPUTE)
-struct anv_graphics_pipeline_create_info {
- /**
- * If non-negative, overrides the color attachment count of the pipeline's
- * subpass.
- */
- int8_t color_attachment_count;
-
- bool use_repclear;
- bool disable_vs;
- bool use_rectlist;
-};
-
VkResult
anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
struct anv_pipeline_cache *cache,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
- const struct anv_graphics_pipeline_create_info *extra,
const VkAllocationCallbacks *alloc);
VkResult
const char *entrypoint,
const VkSpecializationInfo *spec_info);
-VkResult
-anv_graphics_pipeline_create(VkDevice device,
- VkPipelineCache cache,
- const VkGraphicsPipelineCreateInfo *pCreateInfo,
- const struct anv_graphics_pipeline_create_info *extra,
- const VkAllocationCallbacks *alloc,
- VkPipeline *pPipeline);
-
-struct anv_format_swizzle {
- enum isl_channel_select r:4;
- enum isl_channel_select g:4;
- enum isl_channel_select b:4;
- enum isl_channel_select a:4;
-};
-
struct anv_format {
enum isl_format isl_format:16;
- struct anv_format_swizzle swizzle;
+ struct isl_swizzle swizzle;
};
struct anv_format
-anv_get_format(const struct brw_device_info *devinfo, VkFormat format,
+anv_get_format(const struct gen_device_info *devinfo, VkFormat format,
VkImageAspectFlags aspect, VkImageTiling tiling);
static inline enum isl_format
-anv_get_isl_format(const struct brw_device_info *devinfo, VkFormat vk_format,
+anv_get_isl_format(const struct gen_device_info *devinfo, VkFormat vk_format,
VkImageAspectFlags aspect, VkImageTiling tiling)
{
return anv_get_format(devinfo, vk_format, aspect, tiling).isl_format;
}
void
-anv_compute_urb_partition(struct anv_pipeline *pipeline);
-
-void
-anv_setup_pipeline_l3_config(struct anv_pipeline *pipeline);
+anv_pipeline_setup_l3_config(struct anv_pipeline *pipeline, bool needs_slm);
/**
* Subsurface of an anv_image.
*/
struct anv_surface {
+ /** Valid only if isl_surf::size > 0. */
struct isl_surf isl;
/**
struct {
struct anv_surface depth_surface;
+ struct anv_surface hiz_surface;
struct anv_surface stencil_surface;
};
};
struct anv_bo *bo;
uint32_t offset; /**< Offset into bo. */
+ struct isl_view isl;
+
VkImageAspectFlags aspect_mask;
VkFormat vk_format;
- uint32_t base_layer;
- uint32_t base_mip;
VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
/** RENDER_SURFACE_STATE when using image as a color render target. */
const VkAllocationCallbacks* alloc,
VkImage *pImage);
-struct anv_surface *
-anv_image_get_surface_for_aspect_mask(struct anv_image *image,
+const struct anv_surface *
+anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
VkImageAspectFlags aspect_mask);
-void anv_image_view_init(struct anv_image_view *view,
- struct anv_device *device,
- const VkImageViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer,
- VkImageUsageFlags usage_mask);
+static inline bool
+anv_image_has_hiz(const struct anv_image *image)
+{
+ /* We must check the aspect because anv_image::hiz_surface belongs to
+ * a union.
+ */
+ return (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
+ image->hiz_surface.isl.size > 0;
+}
struct anv_buffer_view {
enum isl_format format; /**< VkBufferViewCreateInfo::format */
struct brw_image_param storage_image_param;
};
-void anv_buffer_view_init(struct anv_buffer_view *view,
- struct anv_device *device,
- const VkBufferViewCreateInfo* pCreateInfo,
- struct anv_cmd_buffer *cmd_buffer);
-
enum isl_format
anv_isl_format_for_descriptor_type(VkDescriptorType type);
struct anv_subpass subpasses[0];
};
-extern struct anv_render_pass anv_meta_dummy_renderpass;
-
struct anv_query_pool_slot {
uint64_t begin;
uint64_t end;
struct anv_bo bo;
};
-VkResult anv_device_init_meta(struct anv_device *device);
-void anv_device_finish_meta(struct anv_device *device);
-
-void *anv_lookup_entrypoint(const char *name);
+void *anv_lookup_entrypoint(const struct gen_device_info *devinfo,
+ const char *name);
void anv_dump_image_to_ppm(struct anv_device *device,
struct anv_image *image, unsigned miplevel,
#ifdef __cplusplus
}
#endif
+
+#endif /* ANV_PRIVATE_H */