void
gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer)
{
+ struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
uint32_t count = cmd_buffer->state.gfx.dynamic.scissor.count;
const VkRect2D *scissors = cmd_buffer->state.gfx.dynamic.scissor.scissors;
struct anv_state scissor_state =
};
const int max = 0xffff;
+
+ uint32_t y_min = s->offset.y;
+ uint32_t x_min = s->offset.x;
+ uint32_t y_max = s->offset.y + s->extent.height - 1;
+ uint32_t x_max = s->offset.x + s->extent.width - 1;
+
+ /* Do this math using int64_t so overflow gets clamped correctly. */
+ if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
+ y_min = clamp_int64((uint64_t) y_min,
+ cmd_buffer->state.render_area.offset.y, max);
+ x_min = clamp_int64((uint64_t) x_min,
+ cmd_buffer->state.render_area.offset.x, max);
+ y_max = clamp_int64((uint64_t) y_max, 0,
+ cmd_buffer->state.render_area.offset.y +
+ cmd_buffer->state.render_area.extent.height - 1);
+ x_max = clamp_int64((uint64_t) x_max, 0,
+ cmd_buffer->state.render_area.offset.x +
+ cmd_buffer->state.render_area.extent.width - 1);
+ } else if (fb) {
+ y_min = clamp_int64((uint64_t) y_min, 0, max);
+ x_min = clamp_int64((uint64_t) x_min, 0, max);
+ y_max = clamp_int64((uint64_t) y_max, 0, fb->height - 1);
+ x_max = clamp_int64((uint64_t) x_max, 0, fb->width - 1);
+ }
+
struct GEN7_SCISSOR_RECT scissor = {
- /* Do this math using int64_t so overflow gets clamped correctly. */
- .ScissorRectangleYMin = clamp_int64(s->offset.y, 0, max),
- .ScissorRectangleXMin = clamp_int64(s->offset.x, 0, max),
- .ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, max),
- .ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, max)
+ .ScissorRectangleYMin = y_min,
+ .ScissorRectangleXMin = x_min,
+ .ScissorRectangleYMax = y_max,
+ .ScissorRectangleXMax = x_max
};
if (s->extent.width <= 0 || s->extent.height <= 0) {
GEN7_3DSTATE_SCISSOR_STATE_POINTERS, ssp) {
ssp.ScissorRectPointer = scissor_state.offset;
}
-
- anv_state_flush(cmd_buffer->device, scissor_state);
}
#endif
-static const uint32_t vk_to_gen_index_type[] = {
- [VK_INDEX_TYPE_UINT16] = INDEX_WORD,
- [VK_INDEX_TYPE_UINT32] = INDEX_DWORD,
-};
+static uint32_t vk_to_gen_index_type(VkIndexType type)
+{
+ switch (type) {
+ case VK_INDEX_TYPE_UINT8_EXT:
+ return INDEX_BYTE;
+ case VK_INDEX_TYPE_UINT16:
+ return INDEX_WORD;
+ case VK_INDEX_TYPE_UINT32:
+ return INDEX_DWORD;
+ default:
+ unreachable("invalid index type");
+ }
+}
-static const uint32_t restart_index_for_type[] = {
- [VK_INDEX_TYPE_UINT16] = UINT16_MAX,
- [VK_INDEX_TYPE_UINT32] = UINT32_MAX,
-};
+static uint32_t restart_index_for_type(VkIndexType type)
+{
+ switch (type) {
+ case VK_INDEX_TYPE_UINT8_EXT:
+ return UINT8_MAX;
+ case VK_INDEX_TYPE_UINT16:
+ return UINT16_MAX;
+ case VK_INDEX_TYPE_UINT32:
+ return UINT32_MAX;
+ default:
+ unreachable("invalid index type");
+ }
+}
void genX(CmdBindIndexBuffer)(
VkCommandBuffer commandBuffer,
cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_INDEX_BUFFER;
if (GEN_IS_HASWELL)
- cmd_buffer->state.restart_index = restart_index_for_type[indexType];
+ cmd_buffer->state.restart_index = restart_index_for_type(indexType);
cmd_buffer->state.gfx.gen7.index_buffer = buffer;
- cmd_buffer->state.gfx.gen7.index_type = vk_to_gen_index_type[indexType];
+ cmd_buffer->state.gfx.gen7.index_type = vk_to_gen_index_type(indexType);
cmd_buffer->state.gfx.gen7.index_offset = offset;
}
const struct anv_render_pass *pass = cmd_buffer->state.pass;
const struct anv_subpass *subpass = cmd_buffer->state.subpass;
- if (subpass->depth_stencil_attachment.attachment >= pass->attachment_count)
+ if (!subpass->depth_stencil_attachment)
return D16_UNORM;
struct anv_render_pass_attachment *att =
- &pass->attachments[subpass->depth_stencil_attachment.attachment];
+ &pass->attachments[subpass->depth_stencil_attachment->attachment];
switch (att->format) {
case VK_FORMAT_D16_UNORM:
void
genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
{
- struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
+ struct anv_graphics_pipeline *pipeline = cmd_buffer->state.gfx.pipeline;
struct anv_dynamic_state *d = &cmd_buffer->state.gfx.dynamic;
+ static const uint32_t vk_to_gen_cullmode[] = {
+ [VK_CULL_MODE_NONE] = CULLMODE_NONE,
+ [VK_CULL_MODE_FRONT_BIT] = CULLMODE_FRONT,
+ [VK_CULL_MODE_BACK_BIT] = CULLMODE_BACK,
+ [VK_CULL_MODE_FRONT_AND_BACK] = CULLMODE_BOTH
+ };
+ static const uint32_t vk_to_gen_front_face[] = {
+ [VK_FRONT_FACE_COUNTER_CLOCKWISE] = 1,
+ [VK_FRONT_FACE_CLOCKWISE] = 0
+ };
+
+ static const uint32_t vk_to_gen_compare_op[] = {
+ [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
+ [VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
+ [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
+ [VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLEQUAL,
+ [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER,
+ [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
+ [VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGEQUAL,
+ [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
+ };
+
+ static const uint32_t vk_to_gen_stencil_op[] = {
+ [VK_STENCIL_OP_KEEP] = STENCILOP_KEEP,
+ [VK_STENCIL_OP_ZERO] = STENCILOP_ZERO,
+ [VK_STENCIL_OP_REPLACE] = STENCILOP_REPLACE,
+ [VK_STENCIL_OP_INCREMENT_AND_CLAMP] = STENCILOP_INCRSAT,
+ [VK_STENCIL_OP_DECREMENT_AND_CLAMP] = STENCILOP_DECRSAT,
+ [VK_STENCIL_OP_INVERT] = STENCILOP_INVERT,
+ [VK_STENCIL_OP_INCREMENT_AND_WRAP] = STENCILOP_INCR,
+ [VK_STENCIL_OP_DECREMENT_AND_WRAP] = STENCILOP_DECR,
+ };
+
if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_RENDER_TARGETS |
ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH |
- ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)) {
+ ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS |
+ ANV_CMD_DIRTY_DYNAMIC_CULL_MODE |
+ ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE)) {
uint32_t sf_dw[GENX(3DSTATE_SF_length)];
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
.LineWidth = d->line_width,
.GlobalDepthOffsetConstant = d->depth_bias.bias,
.GlobalDepthOffsetScale = d->depth_bias.slope,
- .GlobalDepthOffsetClamp = d->depth_bias.clamp
+ .GlobalDepthOffsetClamp = d->depth_bias.clamp,
+ .FrontWinding = vk_to_gen_front_face[d->front_face],
+ .CullMode = vk_to_gen_cullmode[d->cull_mode],
};
GENX(3DSTATE_SF_pack)(NULL, sf_dw, &sf);
.BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff,
};
GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc);
- anv_state_flush(cmd_buffer->device, cc_state);
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) {
ccp.ColorCalcStatePointer = cc_state.offset;
}
}
+ if (cmd_buffer->state.gfx.dirty & ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE) {
+ anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_LINE_STIPPLE), ls) {
+ ls.LineStipplePattern = d->line_stipple.pattern;
+ ls.LineStippleInverseRepeatCount =
+ 1.0f / MAX2(1, d->line_stipple.factor);
+ ls.LineStippleRepeatCount = d->line_stipple.factor;
+ }
+ }
+
if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
ANV_CMD_DIRTY_RENDER_TARGETS |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
- ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) {
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK |
+ ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE |
+ ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE |
+ ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE |
+ ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP)) {
uint32_t depth_stencil_dw[GENX(DEPTH_STENCIL_STATE_length)];
struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
.StencilBufferWriteEnable =
(d->stencil_write_mask.front || d->stencil_write_mask.back) &&
- pipeline->writes_stencil,
+ d->stencil_test_enable,
+
+ .DepthTestEnable = d->depth_test_enable,
+ .DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable,
+ .DepthTestFunction = vk_to_gen_compare_op[d->depth_compare_op],
+ .StencilTestEnable = d->stencil_test_enable,
+ .StencilFailOp = vk_to_gen_stencil_op[d->stencil_op.front.fail_op],
+ .StencilPassDepthPassOp = vk_to_gen_stencil_op[d->stencil_op.front.pass_op],
+ .StencilPassDepthFailOp = vk_to_gen_stencil_op[d->stencil_op.front.depth_fail_op],
+ .StencilTestFunction = vk_to_gen_compare_op[d->stencil_op.front.compare_op],
+ .BackfaceStencilFailOp = vk_to_gen_stencil_op[d->stencil_op.back.fail_op],
+ .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[d->stencil_op.back.pass_op],
+ .BackfaceStencilPassDepthFailOp = vk_to_gen_stencil_op[d->stencil_op.back.depth_fail_op],
+ .BackfaceStencilTestFunction = vk_to_gen_compare_op[d->stencil_op.back.compare_op],
};
GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil);
ib.CutIndexEnable = pipeline->primitive_restart;
#endif
ib.IndexFormat = cmd_buffer->state.gfx.gen7.index_type;
- ib.MemoryObjectControlState = GENX(MOCS);
+ ib.MOCS = anv_mocs_for_bo(cmd_buffer->device,
+ buffer->address.bo);
- ib.BufferStartingAddress =
- (struct anv_address) { buffer->bo, buffer->offset + offset };
- ib.BufferEndingAddress =
- (struct anv_address) { buffer->bo, buffer->offset + buffer->size };
+ ib.BufferStartingAddress = anv_address_add(buffer->address,
+ offset);
+ ib.BufferEndingAddress = anv_address_add(buffer->address,
+ buffer->size);
}
}
+ static const uint32_t vk_to_gen_primitive_type[] = {
+ [VK_PRIMITIVE_TOPOLOGY_POINT_LIST] = _3DPRIM_POINTLIST,
+ [VK_PRIMITIVE_TOPOLOGY_LINE_LIST] = _3DPRIM_LINELIST,
+ [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP] = _3DPRIM_LINESTRIP,
+ [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST] = _3DPRIM_TRILIST,
+ [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP] = _3DPRIM_TRISTRIP,
+ [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN] = _3DPRIM_TRIFAN,
+ [VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY] = _3DPRIM_LINELIST_ADJ,
+ [VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY] = _3DPRIM_LINESTRIP_ADJ,
+ [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY] = _3DPRIM_TRILIST_ADJ,
+ [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY] = _3DPRIM_TRISTRIP_ADJ,
+ };
+
+ if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE |
+ ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY)) {
+ uint32_t topology;
+ if (anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_EVAL))
+ topology = d->primitive_topology;
+ else
+ topology = vk_to_gen_primitive_type[d->primitive_topology];
+
+ cmd_buffer->state.gfx.primitive_topology = topology;
+ }
+
cmd_buffer->state.gfx.dirty = 0;
}
{
/* The NP PMA fix doesn't exist on gen7 */
}
-
-void genX(CmdSetEvent)(
- VkCommandBuffer commandBuffer,
- VkEvent event,
- VkPipelineStageFlags stageMask)
-{
- anv_finishme("Implement events on gen7");
-}
-
-void genX(CmdResetEvent)(
- VkCommandBuffer commandBuffer,
- VkEvent event,
- VkPipelineStageFlags stageMask)
-{
- anv_finishme("Implement events on gen7");
-}
-
-void genX(CmdWaitEvents)(
- VkCommandBuffer commandBuffer,
- uint32_t eventCount,
- const VkEvent* pEvents,
- VkPipelineStageFlags srcStageMask,
- VkPipelineStageFlags destStageMask,
- uint32_t memoryBarrierCount,
- const VkMemoryBarrier* pMemoryBarriers,
- uint32_t bufferMemoryBarrierCount,
- const VkBufferMemoryBarrier* pBufferMemoryBarriers,
- uint32_t imageMemoryBarrierCount,
- const VkImageMemoryBarrier* pImageMemoryBarriers)
-{
- anv_finishme("Implement events on gen7");
-
- genX(CmdPipelineBarrier)(commandBuffer, srcStageMask, destStageMask,
- false, /* byRegion */
- memoryBarrierCount, pMemoryBarriers,
- bufferMemoryBarrierCount, pBufferMemoryBarriers,
- imageMemoryBarrierCount, pImageMemoryBarriers);
-}
projects / mesa.git / blobdiff