Switch from cElementTree to ElementTree.
[mesa.git] / src / intel / vulkan / genX_blorp_exec.c
index fed4455ca073bb6f034c955f71858ef10311fd6a..15ecf7805af5b8782658c89e3296595e2ecfaf81 100644 (file)
@@ -66,7 +66,7 @@ blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset,
       anv_batch_set_error(&cmd_buffer->batch, result);
 
    void *dest = anv_block_pool_map(
-      &cmd_buffer->device->surface_state_pool.block_pool, ss_offset);
+      &cmd_buffer->device->surface_state_pool.block_pool, ss_offset, 8);
    write_reloc(cmd_buffer->device, dest, address_u64, false);
 }
 
@@ -178,17 +178,16 @@ blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch,
                                                        (1 << num_vbs) - 1);
 }
 
-#if GEN_GEN >= 8
-static struct blorp_address
-blorp_get_workaround_page(struct blorp_batch *batch)
+UNUSED static struct blorp_address
+blorp_get_workaround_address(struct blorp_batch *batch)
 {
    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
 
    return (struct blorp_address) {
-      .buffer = cmd_buffer->device->workaround_bo,
+      .buffer = cmd_buffer->device->workaround_address.bo,
+      .offset = cmd_buffer->device->workaround_address.offset,
    };
 }
-#endif
 
 static void
 blorp_flush_range(struct blorp_batch *batch, void *start, size_t size)
@@ -197,22 +196,11 @@ blorp_flush_range(struct blorp_batch *batch, void *start, size_t size)
     */
 }
 
-static void
-blorp_emit_urb_config(struct blorp_batch *batch,
-                      unsigned vs_entry_size, unsigned sf_entry_size)
+static const struct gen_l3_config *
+blorp_get_l3_config(struct blorp_batch *batch)
 {
-   struct anv_device *device = batch->blorp->driver_ctx;
    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
-
-   assert(sf_entry_size == 0);
-
-   const unsigned entry_size[4] = { vs_entry_size, 1, 1, 1 };
-
-   genX(emit_urb_setup)(device, &cmd_buffer->batch,
-                        cmd_buffer->state.current_l3_config,
-                        VK_SHADER_STAGE_VERTEX_BIT |
-                        VK_SHADER_STAGE_FRAGMENT_BIT,
-                        entry_size);
+   return cmd_buffer->state.current_l3_config;
 }
 
 void
@@ -259,10 +247,6 @@ genX(blorp_exec)(struct blorp_batch *batch,
 
    genX(flush_pipeline_select_3d)(cmd_buffer);
 
-#if GEN_GEN >= 12
-   genX(cmd_buffer_aux_map_state)(cmd_buffer);
-#endif
-
    genX(cmd_buffer_emit_gen7_depth_flush)(cmd_buffer);
 
    /* BLORP doesn't do anything fancy with depth such as discards, so we want