anv/clear: Handle ClearImage on 3-D images
[mesa.git] / src / intel / vulkan / genX_pipeline.c
index cc8841ea8a0afe40f70b110dd1d864d96a1852ec..458e80c82b155357fec87778fbf29c95cc823477 100644 (file)
@@ -74,6 +74,8 @@ genX(compute_pipeline_create)(
    pipeline->active_stages = 0;
    pipeline->total_scratch = 0;
 
+   pipeline->needs_data_cache = false;
+
    assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE_BIT);
    ANV_FROM_HANDLE(anv_shader_module, module,  pCreateInfo->stage.module);
    anv_pipeline_compile_cs(pipeline, cache, pCreateInfo, module,
@@ -82,19 +84,12 @@ genX(compute_pipeline_create)(
 
    pipeline->use_repclear = false;
 
-   const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
-   const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
+   anv_setup_pipeline_l3_config(pipeline);
 
-   unsigned local_id_dwords = cs_prog_data->local_invocation_id_regs * 8;
-   unsigned push_constant_data_size =
-      (prog_data->nr_params + local_id_dwords) * 4;
-   unsigned reg_aligned_constant_size = ALIGN(push_constant_data_size, 32);
-   unsigned push_constant_regs = reg_aligned_constant_size / 32;
+   const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
 
    uint32_t group_size = cs_prog_data->local_size[0] *
       cs_prog_data->local_size[1] * cs_prog_data->local_size[2];
-   pipeline->cs_thread_width_max =
-      DIV_ROUND_UP(group_size, cs_prog_data->simd_size);
    uint32_t remainder = group_size & (cs_prog_data->simd_size - 1);
 
    if (remainder > 0)
@@ -103,25 +98,27 @@ genX(compute_pipeline_create)(
       pipeline->cs_right_mask = ~0u >> (32 - cs_prog_data->simd_size);
 
    const uint32_t vfe_curbe_allocation =
-      push_constant_regs * pipeline->cs_thread_width_max;
+      ALIGN(cs_prog_data->push.per_thread.regs * cs_prog_data->threads +
+            cs_prog_data->push.cross_thread.regs, 2);
 
-   anv_batch_emit(&pipeline->batch, GENX(MEDIA_VFE_STATE),
-                  .ScratchSpaceBasePointer = pipeline->scratch_start[MESA_SHADER_COMPUTE],
-                  .PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048),
+   anv_batch_emit(&pipeline->batch, GENX(MEDIA_VFE_STATE), vfe) {
+      vfe.ScratchSpaceBasePointer = pipeline->scratch_start[MESA_SHADER_COMPUTE];
+      vfe.PerThreadScratchSpace  = ffs(cs_prog_data->base.total_scratch / 2048);
 #if GEN_GEN > 7
-                  .ScratchSpaceBasePointerHigh = 0,
-                  .StackSize = 0,
+      vfe.ScratchSpaceBasePointerHigh = 0;
+      vfe.StackSize              = 0;
 #else
-                  .GPGPUMode = true,
+      vfe.GPGPUMode              = true;
 #endif
-                  .MaximumNumberofThreads = device->info.max_cs_threads - 1,
-                  .NumberofURBEntries = GEN_GEN <= 7 ? 0 : 2,
-                  .ResetGatewayTimer = true,
+      vfe.MaximumNumberofThreads = device->info.max_cs_threads - 1;
+      vfe.NumberofURBEntries     = GEN_GEN <= 7 ? 0 : 2;
+      vfe.ResetGatewayTimer      = true;
 #if GEN_GEN <= 8
-                  .BypassGatewayControl = true,
+      vfe.BypassGatewayControl   = true;
 #endif
-                  .URBEntryAllocationSize = GEN_GEN <= 7 ? 0 : 2,
-                  .CURBEAllocationSize = vfe_curbe_allocation);
+      vfe.URBEntryAllocationSize = GEN_GEN <= 7 ? 0 : 2;
+      vfe.CURBEAllocationSize    = vfe_curbe_allocation;
+   }
 
    *pPipeline = anv_pipeline_to_handle(pipeline);