/* When we free the pipeline, we detect stages based on the NULL status
* of various prog_data pointers. Make them NULL by default.
*/
- memset(pipeline->prog_data, 0, sizeof(pipeline->prog_data));
- memset(pipeline->scratch_start, 0, sizeof(pipeline->scratch_start));
- memset(pipeline->bindings, 0, sizeof(pipeline->bindings));
+ memset(pipeline->shaders, 0, sizeof(pipeline->shaders));
pipeline->vs_simd8 = NO_KERNEL;
pipeline->vs_vec4 = NO_KERNEL;
pipeline->gs_kernel = NO_KERNEL;
pipeline->active_stages = 0;
- pipeline->total_scratch = 0;
+
+ pipeline->needs_data_cache = false;
assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE_BIT);
ANV_FROM_HANDLE(anv_shader_module, module, pCreateInfo->stage.module);
- anv_pipeline_compile_cs(pipeline, cache, pCreateInfo, module,
- pCreateInfo->stage.pName,
- pCreateInfo->stage.pSpecializationInfo);
+ result = anv_pipeline_compile_cs(pipeline, cache, pCreateInfo, module,
+ pCreateInfo->stage.pName,
+ pCreateInfo->stage.pSpecializationInfo);
+ if (result != VK_SUCCESS) {
+ anv_free2(&device->alloc, pAllocator, pipeline);
+ return result;
+ }
pipeline->use_repclear = false;
const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
- const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
- unsigned local_id_dwords = cs_prog_data->local_invocation_id_regs * 8;
- unsigned push_constant_data_size =
- (prog_data->nr_params + local_id_dwords) * 4;
- unsigned reg_aligned_constant_size = ALIGN(push_constant_data_size, 32);
- unsigned push_constant_regs = reg_aligned_constant_size / 32;
+ anv_pipeline_setup_l3_config(pipeline, cs_prog_data->base.total_shared > 0);
uint32_t group_size = cs_prog_data->local_size[0] *
cs_prog_data->local_size[1] * cs_prog_data->local_size[2];
- pipeline->cs_thread_width_max =
- DIV_ROUND_UP(group_size, cs_prog_data->simd_size);
uint32_t remainder = group_size & (cs_prog_data->simd_size - 1);
if (remainder > 0)
pipeline->cs_right_mask = ~0u >> (32 - cs_prog_data->simd_size);
const uint32_t vfe_curbe_allocation =
- push_constant_regs * pipeline->cs_thread_width_max;
-
- anv_batch_emit(&pipeline->batch, GENX(MEDIA_VFE_STATE),
- .ScratchSpaceBasePointer = pipeline->scratch_start[MESA_SHADER_COMPUTE],
- .PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048),
+ ALIGN(cs_prog_data->push.per_thread.regs * cs_prog_data->threads +
+ cs_prog_data->push.cross_thread.regs, 2);
+
+ anv_batch_emit(&pipeline->batch, GENX(MEDIA_VFE_STATE), vfe) {
+ vfe.ScratchSpaceBasePointer = (struct anv_address) {
+ .bo = anv_scratch_pool_alloc(device, &device->scratch_pool,
+ MESA_SHADER_COMPUTE,
+ cs_prog_data->base.total_scratch),
+ .offset = 0,
+ };
+ vfe.PerThreadScratchSpace = ffs(cs_prog_data->base.total_scratch / 2048);
#if GEN_GEN > 7
- .ScratchSpaceBasePointerHigh = 0,
- .StackSize = 0,
+ vfe.StackSize = 0;
#else
- .GPGPUMode = true,
+ vfe.GPGPUMode = true;
#endif
- .MaximumNumberofThreads = device->info.max_cs_threads - 1,
- .NumberofURBEntries = GEN_GEN <= 7 ? 0 : 2,
- .ResetGatewayTimer = true,
+ vfe.MaximumNumberofThreads = device->info.max_cs_threads - 1;
+ vfe.NumberofURBEntries = GEN_GEN <= 7 ? 0 : 2;
+ vfe.ResetGatewayTimer = true;
#if GEN_GEN <= 8
- .BypassGatewayControl = true,
+ vfe.BypassGatewayControl = true;
#endif
- .URBEntryAllocationSize = GEN_GEN <= 7 ? 0 : 2,
- .CURBEAllocationSize = vfe_curbe_allocation);
+ vfe.URBEntryAllocationSize = GEN_GEN <= 7 ? 0 : 2;
+ vfe.CURBEAllocationSize = vfe_curbe_allocation;
+ }
*pPipeline = anv_pipeline_to_handle(pipeline);