anv: pipeline: gen7: fix assert in debug mode

[mesa.git] / src / intel / vulkan / genX_pipeline_util.h

diff --git a/src/intel/vulkan/genX_pipeline_util.h b/src/intel/vulkan/genX_pipeline_util.h
index cf2adb0cfa485b52b5689f4f3e56612e098e1c3e..679fb5768351370674b307c9ff2da97615e6718c 100644 (file)
--- a/src/intel/vulkan/genX_pipeline_util.h
+++ b/src/intel/vulkan/genX_pipeline_util.h
@@ -463,7 +463,11 @@ emit_ms_state(struct anv_pipeline *pipeline,
     *
     * 3DSTATE_SAMPLE_MASK.SampleMask is 16 bits.
     */
+#if GEN_GEN >= 8
    uint32_t sample_mask = 0xffff;
+#else
+   uint32_t sample_mask = 0xff;
+#endif
 
    if (info) {
       samples = info->rasterizationSamples;