cpu: Apply the ARM TLB rework to the O3 checker CPU.
[gem5.git] / src / kern / SConscript
index b905a8b415095048c822c908238675774939b156..d079cbe51341b9a513851f59fd3cac5523efb018 100644 (file)
 
 Import('*')
 
-if env['FULL_SYSTEM']:
-    Source('kernel_stats.cc')
-    Source('system_events.cc')
+if env['TARGET_ISA'] == 'null':
+    Return()
 
-    TraceFlag('DebugPrintf')
-    TraceFlag('Printf')
+Source('kernel_stats.cc')
+Source('linux/events.cc')
+Source('linux/linux.cc')
+Source('linux/helpers.cc')
+Source('linux/printk.cc')
+Source('freebsd/events.cc')
+Source('operatingsystem.cc')
+Source('system_events.cc')
 
-    Source('linux/events.cc')
-    Source('linux/linux_syscalls.cc')
-    Source('linux/printk.cc')
-    
-    # Workaround for bug in SCons version > 0.97d20071212
-    # Scons bug id: 2006 M5 Bug id: 308
-    Dir('tru64')
-
-    if env['TARGET_ISA'] == 'alpha':
-        Source('tru64/dump_mbuf.cc')
-        Source('tru64/printf.cc')
-        Source('tru64/tru64_events.cc')
-        Source('tru64/tru64_syscalls.cc')
-        TraceFlag('BADADDR')
-
-# Workaround for bug in SCons version > 0.97d20071212
-# Scons bug id: 2006 M5 Bug id: 308
-else:
-    Dir('linux')
-    if env['TARGET_ISA'] == 'alpha':
-        Dir('tru64')
-    elif env['TARGET_ISA'] == 'sparc':
-        Dir('solaris')
+DebugFlag('DebugPrintf')
+DebugFlag('Printf')