ARM: Make sure that software prefetch instructions can't change the state of the TLB

[gem5.git] / src / kern / system_events.cc

diff --git a/src/kern/system_events.cc b/src/kern/system_events.cc
index 177ce96d16db466d197f84bda2677a4412e44260..bd01ed9ede0a1834cd1fd6fb00a6115f4e4e5027 100644 (file)
--- a/src/kern/system_events.cc
+++ b/src/kern/system_events.cc
@@ -29,11 +29,11 @@
  *          Nathan Binkert
  */
 
-#include "cpu/base.hh"
+#include "arch/isa_traits.hh"
+#include "base/trace.hh"
+#include "config/the_isa.hh"
 #include "cpu/thread_context.hh"
-#include "kern/kernel_stats.hh"
 #include "kern/system_events.hh"
-#include "sim/system.hh"
 
 using namespace TheISA;
 
@@ -47,19 +47,7 @@ SkipFuncEvent::process(ThreadContext *tc)
 
     tc->setPC(newpc);
     tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst));
-/*
-    BranchPred *bp = tc->getCpuPtr()->getBranchPred();
-    if (bp != NULL) {
-        bp->popRAS(tc->getThreadNum());
-    }
-*/
-}
-
-void
-IdleStartEvent::process(ThreadContext *tc)
-{
-    if (tc->getKernelStats())
-        tc->getKernelStats()->setIdleProcess(
-            tc->readMiscReg(AlphaISA::IPR_PALtemp23), tc);
-    remove();
+#if ISA_HAS_DELAY_SLOT
+    tc->setNextPC(tc->readNextPC() + sizeof(TheISA::MachInst));
+#endif
 }