package MemoryMap;
/*=== Project imports ==== */
import defined_types::*;
- import SoC::*;
+ import soc::*;
import slow_peripherals::*;
`include "instance_defines.bsv"
`include "core_parameters.bsv"
endfunction
function Bool is_IO_Addr(Bit#(`PADDR) addr); // TODO Shuold be PADDR
- if(addr>=`DebugBase && addr<=`DebugEnd)
- return (True);
- else if(addr>=`SDRAMMemBase && addr<=`SDRAMMemEnd)
+ if(addr>=`DebugBase && addr<=`DebugEnd)
+ return (True);
+ else if(addr>=`SDRAMMemBase && addr<=`SDRAMMemEnd)
`ifdef FlexBus
- return (True);
+ return (True);
`else
- return (False);
- `endif
- `ifdef BOOTROM
- else if(addr>=`BootRomBase && addr<=`BootRomEnd)
- return (False);
- `endif
- `ifdef TCMemory
- else if(addr>=`TCMBase && addr<=`TCMEnd)
- return (False);
- `endif
- else
- return True;
+ return (False);
+ `endif
+ `ifdef BOOTROM
+ else if(addr>=`BootRomBase && addr<=`BootRomEnd)
+ return (False);
+ `endif
+ `ifdef TCMemory
+ else if(addr>=`TCMBase && addr<=`TCMEnd)
+ return (False);
+ `endif
+ else
+ return True;
endfunction
endpackage