cache: fix bug in SC upgrade handling

[gem5.git] / src / mem / Bus.py

diff --git a/src/mem/Bus.py b/src/mem/Bus.py
index 247a1fe310d832df74207f6fed84d4b33baa3584..b3f6b29463579ba01d562971cc4494ead278e00c 100644 (file)
--- a/src/mem/Bus.py
+++ b/src/mem/Bus.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2005-2007 The Regents of The University of Michigan
+# Copyright (c) 2005-2008 The Regents of The University of Michigan
 # All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without
@@ -26,12 +26,12 @@
 #
 # Authors: Nathan Binkert
 
-from m5 import build_env
+from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
 from MemObject import MemObject
 
-if build_env['FULL_SYSTEM']:
+if buildEnv['FULL_SYSTEM']:
     from Device import BadAddr
 
 class Bus(MemObject):
@@ -39,11 +39,8 @@ class Bus(MemObject):
     port = VectorPort("vector port for connecting devices")
     bus_id = Param.Int(0, "blah")
     clock = Param.Clock("1GHz", "bus clock speed")
+    header_cycles = Param.Int(1, "cycles of overhead per transaction")
     width = Param.Int(64, "bus width (bytes)")
     responder_set = Param.Bool(False, "Did the user specify a default responder.")
     block_size = Param.Int(64, "The default block size if one isn't set by a device attached to the bus.")
-    if build_env['FULL_SYSTEM']:
-        responder = BadAddr(pio_addr=0x0, pio_latency="1ps")
-        default = Port(Self.responder.pio, "Default port for requests that aren't handled by a device.")
-    else:
-        default = Port("Default port for requests that aren't handled by a device.")
+    default = Port("Default port for requests that aren't handled by a device.")