mem-cache: Add match functions to QueueEntry
[gem5.git] / src / mem / DRAMCtrl.py
index f78a7370dab849e9c05fc5ecb5391e68d6ac97c9..93ea7d56fdc9be2e5d74c5d9b505444303eb94f9 100644 (file)
@@ -46,7 +46,8 @@
 
 from m5.params import *
 from m5.proxy import *
-from AbstractMemory import *
+from m5.objects.AbstractMemory import *
+from m5.objects.QoSMemCtrl import *
 
 # Enum for memory scheduling algorithms, currently First-Come
 # First-Served and a First-Row Hit then First-Come First-Served
@@ -69,7 +70,7 @@ class PageManage(Enum): vals = ['open', 'open_adaptive', 'close',
 # that aims to model the most important system-level performance
 # effects of a DRAM without getting into too much detail of the DRAM
 # itself.
-class DRAMCtrl(AbstractMemory):
+class DRAMCtrl(QoSMemCtrl):
     type = 'DRAMCtrl'
     cxx_header = "mem/dram_ctrl.hh"