Configs: Add support for the InOrder CPU model

[gem5.git] / src / mem / SConscript

diff --git a/src/mem/SConscript b/src/mem/SConscript
index 61fb766d6536d511cd0d91924b444acd81b4ca1d..0b0017f81b2b51d237c22e3f03102e227bb23174 100644 (file)
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -30,6 +30,11 @@
 
 Import('*')
 
+SimObject('Bridge.py')
+SimObject('Bus.py')
+SimObject('PhysicalMemory.py')
+SimObject('MemObject.py')
+
 Source('bridge.cc')
 Source('bus.cc')
 Source('dram.cc')
@@ -38,9 +43,17 @@ Source('packet.cc')
 Source('physical.cc')
 Source('port.cc')
 Source('tport.cc')
+Source('mport.cc')
 
 if env['FULL_SYSTEM']:
     Source('vport.cc')
 else:
     Source('page_table.cc')
     Source('translating_port.cc')
+
+TraceFlag('Bus')
+TraceFlag('BusAddrRanges')
+TraceFlag('BusBridge')
+TraceFlag('LLSC')
+TraceFlag('MMU')
+TraceFlag('MemoryAccess')