mem-cache: Create an address aware TempCacheBlk

[gem5.git] / src / mem / SerialLink.py

diff --git a/src/mem/SerialLink.py b/src/mem/SerialLink.py
index f05f2872df642a40a4943eb3f0791b94ee47caa0..fd9b0ff6b04c4b4636a611cb5cb9458f5dcdf0d0 100644 (file)
--- a/src/mem/SerialLink.py
+++ b/src/mem/SerialLink.py
@@ -61,3 +61,5 @@ class SerialLink(MemObject):
     #  link belongs to and the number of lanes:
     num_lanes = Param.Unsigned(1, "Number of parallel lanes inside the serial"
         "link. (aka. lane width)")
+    link_speed = Param.UInt64(1, "Gb/s Speed of each parallel lane inside the"
+        "serial link. (aka. lane speed)")