ruby: Replace Time with Cycles in SequencerMessage

[gem5.git] / src / mem / bridge.hh

diff --git a/src/mem/bridge.hh b/src/mem/bridge.hh
index eb0b2434faa9a7d375cf28e82e792a63a669c1c5..6855d27222374b0544c239f9eb71baacd096c8cc 100644 (file)
--- a/src/mem/bridge.hh
+++ b/src/mem/bridge.hh
@@ -338,9 +338,10 @@ class Bridge : public MemObject
 
   public:
 
-    virtual MasterPort& getMasterPort(const std::string& if_name,
-                                      int idx = -1);
-    virtual SlavePort& getSlavePort(const std::string& if_name, int idx = -1);
+    virtual BaseMasterPort& getMasterPort(const std::string& if_name,
+                                          PortID idx = InvalidPortID);
+    virtual BaseSlavePort& getSlavePort(const std::string& if_name,
+                                        PortID idx = InvalidPortID);
 
     virtual void init();