mem: Fix guest corruption when caches handle uncacheable accesses

[gem5.git] / src / mem / bus.hh

diff --git a/src/mem/bus.hh b/src/mem/bus.hh
index 26729f7cc5742ab3670f8893246313d68f270781..59dabbfe418ace8e7bf32884c294d7835fe54d2f 100644 (file)
--- a/src/mem/bus.hh
+++ b/src/mem/bus.hh
@@ -94,7 +94,7 @@ class BaseBus : public MemObject
      * whereas a response layer holds master ports.
      */
     template <typename PortClass>
-    class Layer
+    class Layer : public Drainable
     {
 
       public:
@@ -118,7 +118,7 @@ class BaseBus : public MemObject
          *
          * @return 1 if busy or waiting to retry, or 0 if idle
          */
-        unsigned int drain(Event *de);
+        unsigned int drain(DrainManager *dm);
 
         /**
          * Get the bus layer's name
@@ -206,8 +206,8 @@ class BaseBus : public MemObject
         /** the clock speed for the bus layer */
         Tick clock;
 
-        /** event for signalling when drained */
-        Event * drainEvent;
+        /** manager to signal when drained */
+        DrainManager *drainManager;
 
         /**
          * An array of ports that retry should be called
@@ -264,13 +264,13 @@ class BaseBus : public MemObject
     // Checks the cache and returns the id of the port that has the requested
     // address within its range
     inline PortID checkPortCache(Addr addr) const {
-        if (portCache[0].valid && portCache[0].range == addr) {
+        if (portCache[0].valid && portCache[0].range.contains(addr)) {
             return portCache[0].id;
         }
-        if (portCache[1].valid && portCache[1].range == addr) {
+        if (portCache[1].valid && portCache[1].range.contains(addr)) {
             return portCache[1].id;
         }
-        if (portCache[2].valid && portCache[2].range == addr) {
+        if (portCache[2].valid && portCache[2].range.contains(addr)) {
             return portCache[2].id;
         }
 
@@ -361,10 +361,12 @@ class BaseBus : public MemObject
     virtual void init();
 
     /** A function used to return the port associated with this bus object. */
-    virtual MasterPort& getMasterPort(const std::string& if_name, int idx = -1);
-    virtual SlavePort& getSlavePort(const std::string& if_name, int idx = -1);
+    BaseMasterPort& getMasterPort(const std::string& if_name,
+                                  PortID idx = InvalidPortID);
+    BaseSlavePort& getSlavePort(const std::string& if_name,
+                                PortID idx = InvalidPortID);
 
-    virtual unsigned int drain(Event *de) = 0;
+    virtual unsigned int drain(DrainManager *dm) = 0;
 
 };