/*
+ * Copyright (c) 2011-2013 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* All rights reserved.
*
*
* Authors: Ron Dreslinski
* Ali Saidi
+ * Andreas Hansson
+ * William Wang
*/
/**
* @file
- * Declaration of a bus object.
+ * Declaration of an abstract bus base class.
*/
#ifndef __MEM_BUS_HH__
#define __MEM_BUS_HH__
-#include <string>
-#include <list>
-#include <inttypes.h>
+#include <deque>
+#include <set>
-#include "base/range.hh"
+#include "base/addr_range_map.hh"
+#include "base/types.hh"
#include "mem/mem_object.hh"
-#include "mem/packet.hh"
-#include "mem/port.hh"
-#include "mem/request.hh"
-#include "sim/eventq.hh"
+#include "params/BaseBus.hh"
-class Bus : public MemObject
+/**
+ * The base bus contains the common elements of the non-coherent and
+ * coherent bus. It is an abstract class that does not have any of the
+ * functionality relating to the actual reception and transmission of
+ * packets, as this is left for the subclasses.
+ *
+ * The BaseBus is responsible for the basic flow control (busy or
+ * not), the administration of retries, and the address decoding.
+ */
+class BaseBus : public MemObject
{
- /** a globally unique id for this bus. */
- int busId;
- /** the clock speed for the bus */
- int clock;
- /** the width of the bus in bytes */
- int width;
- /** the next tick at which the bus will be idle */
- Tick tickNextIdle;
- static const int defaultId = -1;
+ protected:
+
+ /**
+ * A bus layer is an internal bus structure with its own flow
+ * control and arbitration. Hence, a single-layer bus mimics a
+ * traditional off-chip tri-state bus (like PCI), where only one
+ * set of wires are shared. For on-chip buses, a good starting
+ * point is to have three layers, for requests, responses, and
+ * snoop responses respectively (snoop requests are instantaneous
+ * and do not need any flow control or arbitration). This case is
+ * similar to AHB and some OCP configurations.
+ *
+ * As a further extensions beyond the three-layer bus, a future
+ * multi-layer bus has with one layer per connected slave port
+ * provides a full or partial crossbar, like AXI, OCP, PCIe etc.
+ *
+ * The template parameter, PortClass, indicates the destination
+ * port type for the bus. The retry list holds either master ports
+ * or slave ports, depending on the direction of the layer. Thus,
+ * a request layer has a retry list containing slave ports,
+ * whereas a response layer holds master ports.
+ */
+ template <typename PortClass>
+ class Layer : public Drainable
+ {
+
+ public:
+
+ /**
+ * Create a bus layer and give it a name. The bus layer uses
+ * the bus an event manager.
+ *
+ * @param _bus the bus this layer belongs to
+ * @param _name the layer's name
+ */
+ Layer(BaseBus& _bus, const std::string& _name);
+
+ /**
+ * Drain according to the normal semantics, so that the bus
+ * can tell the layer to drain, and pass an event to signal
+ * back when drained.
+ *
+ * @param de drain event to call once drained
+ *
+ * @return 1 if busy or waiting to retry, or 0 if idle
+ */
+ unsigned int drain(DrainManager *dm);
+
+ /**
+ * Get the bus layer's name
+ */
+ const std::string name() const { return bus.name() + _name; }
+
+
+ /**
+ * Determine if the bus layer accepts a packet from a specific
+ * port. If not, the port in question is also added to the
+ * retry list. In either case the state of the layer is updated
+ * accordingly.
+ *
+ * @param port Source port resenting the packet
+ *
+ * @return True if the bus layer accepts the packet
+ */
+ bool tryTiming(PortClass* port);
+
+ /**
+ * Deal with a destination port accepting a packet by potentially
+ * removing the source port from the retry list (if retrying) and
+ * occupying the bus layer accordingly.
+ *
+ * @param busy_time Time to spend as a result of a successful send
+ */
+ void succeededTiming(Tick busy_time);
+
+ /**
+ * Deal with a destination port not accepting a packet by
+ * potentially adding the source port to the retry list (if
+ * not already at the front) and occupying the bus layer
+ * accordingly.
+ *
+ * @param busy_time Time to spend as a result of a failed send
+ */
+ void failedTiming(PortClass* port, Tick busy_time);
+
+ /** Occupy the bus layer until until */
+ void occupyLayer(Tick until);
+
+ /**
+ * Send a retry to the port at the head of the retryList. The
+ * caller must ensure that the list is not empty.
+ */
+ void retryWaiting();
+
+ /**
+ * Handler a retry from a neighbouring module. Eventually this
+ * should be all encapsulated in the bus. This wraps
+ * retryWaiting by verifying that there are ports waiting
+ * before calling retryWaiting.
+ */
+ void recvRetry();
+
+ private:
+
+ /** The bus this layer is a part of. */
+ BaseBus& bus;
+
+ /** A name for this layer. */
+ std::string _name;
+
+ /**
+ * We declare an enum to track the state of the bus layer. The
+ * starting point is an idle state where the bus layer is
+ * waiting for a packet to arrive. Upon arrival, the bus layer
+ * transitions to the busy state, where it remains either
+ * until the packet transfer is done, or the header time is
+ * spent. Once the bus layer leaves the busy state, it can
+ * either go back to idle, if no packets have arrived while it
+ * was busy, or the bus layer goes on to retry the first port
+ * on the retryList. A similar transition takes place from
+ * idle to retry if the bus layer receives a retry from one of
+ * its connected ports. The retry state lasts until the port
+ * in questions calls sendTiming and returns control to the
+ * bus layer, or goes to a busy state if the port does not
+ * immediately react to the retry by calling sendTiming.
+ */
+ enum State { IDLE, BUSY, RETRY };
+
+ /** track the state of the bus layer */
+ State state;
+
+ /** manager to signal when drained */
+ DrainManager *drainManager;
+
+ /**
+ * An array of ports that retry should be called
+ * on because the original send failed for whatever reason.
+ */
+ std::deque<PortClass*> retryList;
+
+ /**
+ * Release the bus layer after being occupied and return to an
+ * idle state where we proceed to send a retry to any
+ * potential waiting port, or drain if asked to do so.
+ */
+ void releaseLayer();
+
+ /** event used to schedule a release of the layer */
+ EventWrapper<Layer, &Layer::releaseLayer> releaseEvent;
- struct DevMap {
- int portId;
- Range<Addr> range;
};
- std::vector<DevMap> portList;
- AddrRangeList defaultRange;
- std::vector<DevMap> portSnoopList;
- /** Function called by the port when the bus is recieving a Timing
- transaction.*/
- bool recvTiming(Packet *pkt);
+ /** cycles of overhead per transaction */
+ const Cycles headerCycles;
+ /** the width of the bus in bytes */
+ const uint32_t width;
- /** Function called by the port when the bus is recieving a Atomic
- transaction.*/
- Tick recvAtomic(Packet *pkt);
+ typedef AddrRangeMap<PortID>::iterator PortMapIter;
+ typedef AddrRangeMap<PortID>::const_iterator PortMapConstIter;
+ AddrRangeMap<PortID> portMap;
- /** Function called by the port when the bus is recieving a Functional
- transaction.*/
- void recvFunctional(Packet *pkt);
+ /** all contigous ranges seen by this bus */
+ AddrRangeList busRanges;
- /** Timing function called by port when it is once again able to process
- * requests. */
- void recvRetry(int id);
+ AddrRange defaultRange;
- /** Function called by the port when the bus is recieving a status change.*/
- void recvStatusChange(Port::Status status, int id);
+ /**
+ * Function called by the port when the bus is recieving a range change.
+ *
+ * @param master_port_id id of the port that received the change
+ */
+ void recvRangeChange(PortID master_port_id);
/** Find which port connected to this bus (if any) should be given a packet
* with this address.
* @param addr Address to find port for.
- * @param id Id of the port this packet was received from (to prevent
- * loops)
- * @return pointer to port that the packet should be sent out of.
- */
- Port *findPort(Addr addr, int id);
-
- /** Find all ports with a matching snoop range, except src port. Keep in mind
- * that the ranges shouldn't overlap or you will get a double snoop to the same
- * interface.and the cache will assert out.
- * @param addr Address to find snoop prts for.
- * @param id Id of the src port of the request to avoid calling snoop on src
- * @return vector of IDs to snoop on
+ * @return id of port that the packet should be sent out of.
*/
- std::vector<int> findSnoopPorts(Addr addr, int id);
-
- /** Snoop all relevant ports atomicly. */
- Tick atomicSnoop(Packet *pkt);
-
- /** Snoop all relevant ports functionally. */
- void functionalSnoop(Packet *pkt);
-
- /** Call snoop on caches, be sure to set SNOOP_COMMIT bit if you want
- * the snoop to happen
- * @return True if succeds.
- */
- bool timingSnoop(Packet *pkt);
-
- /** Process address range request.
- * @param resp addresses that we can respond to
- * @param snoop addresses that we would like to snoop
- * @param id ide of the busport that made the request.
- */
- void addressRanges(AddrRangeList &resp, AddrRangeList &snoop, int id);
-
- /** Occupy the bus with transmitting the packet pkt */
- void occupyBus(PacketPtr pkt);
-
- /** Declaration of the buses port type, one will be instantiated for each
- of the interfaces connecting to the bus. */
- class BusPort : public Port
- {
- bool _onRetryList;
-
- /** A pointer to the bus to which this port belongs. */
- Bus *bus;
-
- /** A id to keep track of the intercafe ID this port is connected to. */
- int id;
-
- public:
-
- /** Constructor for the BusPort.*/
- BusPort(const std::string &_name, Bus *_bus, int _id)
- : Port(_name), _onRetryList(false), bus(_bus), id(_id)
- { }
+ PortID findPort(Addr addr);
- bool onRetryList()
- { return _onRetryList; }
+ // Cache for the findPort function storing recently used ports from portMap
+ struct PortCache {
+ bool valid;
+ PortID id;
+ AddrRange range;
+ };
- void onRetryList(bool newVal)
- { _onRetryList = newVal; }
+ PortCache portCache[3];
- protected:
+ // Checks the cache and returns the id of the port that has the requested
+ // address within its range
+ inline PortID checkPortCache(Addr addr) const {
+ if (portCache[0].valid && portCache[0].range.contains(addr)) {
+ return portCache[0].id;
+ }
+ if (portCache[1].valid && portCache[1].range.contains(addr)) {
+ return portCache[1].id;
+ }
+ if (portCache[2].valid && portCache[2].range.contains(addr)) {
+ return portCache[2].id;
+ }
- /** When reciving a timing request from the peer port (at id),
- pass it to the bus. */
- virtual bool recvTiming(Packet *pkt)
- { pkt->setSrc(id); return bus->recvTiming(pkt); }
+ return InvalidPortID;
+ }
- /** When reciving a Atomic requestfrom the peer port (at id),
- pass it to the bus. */
- virtual Tick recvAtomic(Packet *pkt)
- { pkt->setSrc(id); return bus->recvAtomic(pkt); }
+ // Clears the earliest entry of the cache and inserts a new port entry
+ inline void updatePortCache(short id, const AddrRange& range) {
+ portCache[2].valid = portCache[1].valid;
+ portCache[2].id = portCache[1].id;
+ portCache[2].range = portCache[1].range;
- /** When reciving a Functional requestfrom the peer port (at id),
- pass it to the bus. */
- virtual void recvFunctional(Packet *pkt)
- { pkt->setSrc(id); bus->recvFunctional(pkt); }
+ portCache[1].valid = portCache[0].valid;
+ portCache[1].id = portCache[0].id;
+ portCache[1].range = portCache[0].range;
- /** When reciving a status changefrom the peer port (at id),
- pass it to the bus. */
- virtual void recvStatusChange(Status status)
- { bus->recvStatusChange(status, id); }
+ portCache[0].valid = true;
+ portCache[0].id = id;
+ portCache[0].range = range;
+ }
- /** When reciving a retry from the peer port (at id),
- pass it to the bus. */
- virtual void recvRetry()
- { bus->recvRetry(id); }
+ // Clears the cache. Needs to be called in constructor.
+ inline void clearPortCache() {
+ portCache[2].valid = false;
+ portCache[1].valid = false;
+ portCache[0].valid = false;
+ }
- // This should return all the 'owned' addresses that are
- // downstream from this bus, yes? That is, the union of all
- // the 'owned' address ranges of all the other interfaces on
- // this bus...
- virtual void getDeviceAddressRanges(AddrRangeList &resp,
- AddrRangeList &snoop)
- { bus->addressRanges(resp, snoop, id); }
+ /**
+ * Return the address ranges the bus is responsible for.
+ *
+ * @return a list of non-overlapping address ranges
+ */
+ AddrRangeList getAddrRanges() const;
- // Hack to make translating port work without changes
- virtual int deviceBlockSize() { return 32; }
+ /**
+ * Calculate the timing parameters for the packet. Updates the
+ * busFirstWordDelay and busLastWordDelay fields of the packet
+ * object with the relative number of ticks required to transmit
+ * the header and the first word, and the last word, respectively.
+ */
+ void calcPacketTiming(PacketPtr pkt);
+
+ /**
+ * Ask everyone on the bus what their size is and determine the
+ * bus size as either the maximum, or if no device specifies a
+ * block size return the default.
+ *
+ * @return the max of all the sizes or the default if none is set
+ */
+ unsigned deviceBlockSize() const;
- };
+ /**
+ * Remember for each of the master ports of the bus if we got an
+ * address range from the connected slave. For convenience, also
+ * keep track of if we got ranges from all the slave modules or
+ * not.
+ */
+ std::vector<bool> gotAddrRanges;
+ bool gotAllAddrRanges;
- class BusFreeEvent : public Event
- {
- Bus * bus;
+ /** The master and slave ports of the bus */
+ std::vector<SlavePort*> slavePorts;
+ std::vector<MasterPort*> masterPorts;
- public:
- BusFreeEvent(Bus * _bus);
- void process();
- const char *description();
- };
+ /** Convenience typedefs. */
+ typedef std::vector<SlavePort*>::iterator SlavePortIter;
+ typedef std::vector<MasterPort*>::iterator MasterPortIter;
+ typedef std::vector<SlavePort*>::const_iterator SlavePortConstIter;
+ typedef std::vector<MasterPort*>::const_iterator MasterPortConstIter;
- BusFreeEvent busIdle;
+ /** Port that handles requests that don't match any of the interfaces.*/
+ PortID defaultPortID;
- bool inRetry;
+ /** If true, use address range provided by default device. Any
+ address not handled by another port and not in default device's
+ range will cause a fatal error. If false, just send all
+ addresses not handled by another port to default device. */
+ const bool useDefaultRange;
- /** An array of pointers to the peer port interfaces
- connected to this bus.*/
- std::vector<BusPort*> interfaces;
+ uint32_t blockSize;
- /** An array of pointers to ports that retry should be called on because the
- * original send failed for whatever reason.*/
- std::list<BusPort*> retryList;
+ BaseBus(const BaseBusParams *p);
- void addToRetryList(BusPort * port)
- {
- if (!inRetry) {
- // The device wasn't retrying a packet, or wasn't at an appropriate
- // time.
- assert(!port->onRetryList());
- port->onRetryList(true);
- retryList.push_back(port);
- } else {
- if (port->onRetryList()) {
- // The device was retrying a packet. It didn't work, so we'll leave
- // it at the head of the retry list.
- assert(port == retryList.front());
- inRetry = false;
- }
- else {
- retryList.push_back(port);
- }
- }
- }
-
- /** Port that handles requests that don't match any of the interfaces.*/
- Port *defaultPort;
+ virtual ~BaseBus();
public:
- /** A function used to return the port associated with this bus object. */
- virtual Port *getPort(const std::string &if_name, int idx = -1);
-
virtual void init();
- Bus(const std::string &n, int bus_id, int _clock, int _width)
- : MemObject(n), busId(bus_id), clock(_clock), width(_width),
- tickNextIdle(0), busIdle(this), inRetry(false), defaultPort(NULL)
- {
- //Both the width and clock period must be positive
- if (width <= 0)
- fatal("Bus width must be positive\n");
- if (clock <= 0)
- fatal("Bus clock period must be positive\n");
- }
+ /** A function used to return the port associated with this bus object. */
+ BaseMasterPort& getMasterPort(const std::string& if_name,
+ PortID idx = InvalidPortID);
+ BaseSlavePort& getSlavePort(const std::string& if_name,
+ PortID idx = InvalidPortID);
+
+ virtual unsigned int drain(DrainManager *dm) = 0;
};