#define __MEM_BUS_HH__
#include <string>
+#include <set>
#include <list>
#include <inttypes.h>
#include "mem/port.hh"
#include "mem/request.hh"
#include "sim/eventq.hh"
+#include "params/Bus.hh"
class Bus : public MemObject
{
/** Find which port connected to this bus (if any) should be given a packet
* with this address.
* @param addr Address to find port for.
- * @param id Id of the port this packet was received from (to prevent
- * loops)
- * @return pointer to port that the packet should be sent out of.
+ * @return id of port that the packet should be sent out of.
*/
- Port *findPort(Addr addr, int id);
+ int findPort(Addr addr);
+
+ // Cache for the findPort function storing recently used ports from portMap
+ struct PortCache {
+ bool valid;
+ int id;
+ Addr start;
+ Addr end;
+ };
- /** Snoop all relevant ports atomicly. */
- Tick atomicSnoop(PacketPtr pkt, Port* responder);
+ PortCache portCache[3];
- /** Snoop all relevant ports functionally. */
- void functionalSnoop(PacketPtr pkt, Port *responder);
+ // Checks the cache and returns the id of the port that has the requested
+ // address within its range
+ inline int checkPortCache(Addr addr) {
+ if (portCache[0].valid && addr >= portCache[0].start &&
+ addr < portCache[0].end) {
+ return portCache[0].id;
+ }
+ if (portCache[1].valid && addr >= portCache[1].start &&
+ addr < portCache[1].end) {
+ return portCache[1].id;
+ }
+ if (portCache[2].valid && addr >= portCache[2].start &&
+ addr < portCache[2].end) {
+ return portCache[2].id;
+ }
- /** Call snoop on caches, be sure to set SNOOP_COMMIT bit if you want
- * the snoop to happen
- * @return True if succeds.
- */
- bool timingSnoop(PacketPtr pkt, Port *responder);
+ return -1;
+ }
+
+ // Clears the earliest entry of the cache and inserts a new port entry
+ inline void updatePortCache(short id, Addr start, Addr end) {
+ portCache[2].valid = portCache[1].valid;
+ portCache[2].id = portCache[1].id;
+ portCache[2].start = portCache[1].start;
+ portCache[2].end = portCache[1].end;
+
+ portCache[1].valid = portCache[0].valid;
+ portCache[1].id = portCache[0].id;
+ portCache[1].start = portCache[0].start;
+ portCache[1].end = portCache[0].end;
+
+ portCache[0].valid = true;
+ portCache[0].id = id;
+ portCache[0].start = start;
+ portCache[0].end = end;
+ }
+
+ // Clears the cache. Needs to be called in constructor.
+ inline void clearPortCache() {
+ portCache[2].valid = false;
+ portCache[1].valid = false;
+ portCache[0].valid = false;
+ }
/** Process address range request.
* @param resp addresses that we can respond to
BusFreeEvent busIdle;
bool inRetry;
+ std::set<int> inRecvStatusChange;
/** max number of bus ids we've handed out so far */
short maxId;
int cachedBlockSize;
bool cachedBlockSizeValid;
+ // Cache for the peer port interfaces
+ struct BusCache {
+ bool valid;
+ short id;
+ BusPort *port;
+ };
+
+ BusCache busCache[3];
+
+ // Checks the peer port interfaces cache for the port id and returns
+ // a pointer to the matching port
+ inline BusPort* checkBusCache(short id) {
+ if (busCache[0].valid && id == busCache[0].id) {
+ return busCache[0].port;
+ }
+ if (busCache[1].valid && id == busCache[1].id) {
+ return busCache[1].port;
+ }
+ if (busCache[2].valid && id == busCache[2].id) {
+ return busCache[2].port;
+ }
+
+ return NULL;
+ }
+
+ // Replaces the earliest entry in the cache with a new entry
+ inline void updateBusCache(short id, BusPort *port) {
+ busCache[2].valid = busCache[1].valid;
+ busCache[2].id = busCache[1].id;
+ busCache[2].port = busCache[1].port;
+
+ busCache[1].valid = busCache[0].valid;
+ busCache[1].id = busCache[0].id;
+ busCache[1].port = busCache[0].port;
+
+ busCache[0].valid = true;
+ busCache[0].id = id;
+ busCache[0].port = port;
+ }
+
+ // Invalidates the cache. Needs to be called in constructor.
+ inline void clearBusCache() {
+ busCache[2].valid = false;
+ busCache[1].valid = false;
+ busCache[0].valid = false;
+ }
+
+
public:
/** A function used to return the port associated with this bus object. */
virtual void deletePortRefs(Port *p);
virtual void init();
+ virtual void startup();
unsigned int drain(Event *de);
- Bus(const std::string &n, int bus_id, int _clock, int _width,
- bool responder_set, int dflt_blk_size)
- : MemObject(n), busId(bus_id), clock(_clock), width(_width),
+ Bus(const BusParams *p)
+ : MemObject(p), busId(p->bus_id), clock(p->clock), width(p->width),
tickNextIdle(0), drainEvent(NULL), busIdle(this), inRetry(false),
maxId(0), defaultPort(NULL), funcPort(NULL), funcPortId(-4),
- responderSet(responder_set), defaultBlockSize(dflt_blk_size),
+ responderSet(p->responder_set), defaultBlockSize(p->block_size),
cachedBlockSize(0), cachedBlockSizeValid(false)
{
//Both the width and clock period must be positive
fatal("Bus width must be positive\n");
if (clock <= 0)
fatal("Bus clock period must be positive\n");
+ clearBusCache();
+ clearPortCache();
}
};
projects / gem5.git / blobdiff