BaseCache::CacheCmdStats::CacheCmdStats(BaseCache &c,
const std::string &name)
: Stats::Group(&c, name.c_str()), cache(c),
- ADD_STAT(hits, ("number of " + name + " hits").c_str()),
- ADD_STAT(misses, ("number of " + name + " misses").c_str()),
- ADD_STAT(missLatency, ("number of " + name + " miss ticks").c_str()),
- ADD_STAT(accesses,
+ ADD_STAT(hits, UNIT_COUNT, ("number of " + name + " hits").c_str()),
+ ADD_STAT(misses, UNIT_COUNT, ("number of " + name + " misses").c_str()),
+ ADD_STAT(missLatency, UNIT_TICK,
+ ("number of " + name + " miss ticks").c_str()),
+ ADD_STAT(accesses, UNIT_COUNT,
("number of " + name + " accesses(hits+misses)").c_str()),
- ADD_STAT(missRate, ("miss rate for " + name + " accesses").c_str()),
- ADD_STAT(avgMissLatency, ("average " + name + " miss latency").c_str()),
- ADD_STAT(mshrHits, ("number of " + name + " MSHR hits").c_str()),
- ADD_STAT(mshrMisses, ("number of " + name + " MSHR misses").c_str()),
- ADD_STAT(mshrUncacheable,
+ ADD_STAT(missRate, UNIT_RATIO,
+ ("miss rate for " + name + " accesses").c_str()),
+ ADD_STAT(avgMissLatency,
+ UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
+ ("average " + name + " miss latency").c_str()),
+ ADD_STAT(mshrHits, UNIT_COUNT,
+ ("number of " + name + " MSHR hits").c_str()),
+ ADD_STAT(mshrMisses, UNIT_COUNT,
+ ("number of " + name + " MSHR misses").c_str()),
+ ADD_STAT(mshrUncacheable, UNIT_COUNT,
("number of " + name + " MSHR uncacheable").c_str()),
- ADD_STAT(mshrMissLatency,
+ ADD_STAT(mshrMissLatency, UNIT_TICK,
("number of " + name + " MSHR miss ticks").c_str()),
- ADD_STAT(mshrUncacheableLatency,
+ ADD_STAT(mshrUncacheableLatency, UNIT_TICK,
("number of " + name + " MSHR uncacheable ticks").c_str()),
- ADD_STAT(mshrMissRate,
+ ADD_STAT(mshrMissRate, UNIT_RATIO,
("mshr miss rate for " + name + " accesses").c_str()),
ADD_STAT(avgMshrMissLatency,
+ UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
("average " + name + " mshr miss latency").c_str()),
ADD_STAT(avgMshrUncacheableLatency,
+ UNIT_RATE(Stats::Units::Tick, Stats::Units::Count),
("average " + name + " mshr uncacheable latency").c_str())
{
}
BaseCache::CacheStats::CacheStats(BaseCache &c)
: Stats::Group(&c), cache(c),
- ADD_STAT(demandHits, "number of demand (read+write) hits"),
- ADD_STAT(overallHits, "number of overall hits"),
- ADD_STAT(demandMisses, "number of demand (read+write) misses"),
- ADD_STAT(overallMisses, "number of overall misses"),
- ADD_STAT(demandMissLatency, "number of demand (read+write) miss ticks"),
- ADD_STAT(overallMissLatency, "number of overall miss ticks"),
- ADD_STAT(demandAccesses, "number of demand (read+write) accesses"),
- ADD_STAT(overallAccesses, "number of overall (read+write) accesses"),
- ADD_STAT(demandMissRate, "miss rate for demand accesses"),
- ADD_STAT(overallMissRate, "miss rate for overall accesses"),
- ADD_STAT(demandAvgMissLatency, "average overall miss latency"),
- ADD_STAT(overallAvgMissLatency, "average overall miss latency"),
- ADD_STAT(blockedCycles, "number of cycles access was blocked"),
- ADD_STAT(blockedCauses, "number of cycles access was blocked"),
- ADD_STAT(avgBlocked,"average number of cycles each access was blocked"),
- ADD_STAT(unusedPrefetches,
+ ADD_STAT(demandHits, UNIT_COUNT, "number of demand (read+write) hits"),
+ ADD_STAT(overallHits, UNIT_COUNT, "number of overall hits"),
+ ADD_STAT(demandMisses, UNIT_COUNT, "number of demand (read+write) misses"),
+ ADD_STAT(overallMisses, UNIT_COUNT, "number of overall misses"),
+ ADD_STAT(demandMissLatency, UNIT_TICK,
+ "number of demand (read+write) miss ticks"),
+ ADD_STAT(overallMissLatency, UNIT_TICK, "number of overall miss ticks"),
+ ADD_STAT(demandAccesses, UNIT_COUNT,
+ "number of demand (read+write) accesses"),
+ ADD_STAT(overallAccesses, UNIT_COUNT,
+ "number of overall (read+write) accesses"),
+ ADD_STAT(demandMissRate, UNIT_RATIO, "miss rate for demand accesses"),
+ ADD_STAT(overallMissRate, UNIT_RATIO, "miss rate for overall accesses"),
+ ADD_STAT(demandAvgMissLatency,
+ UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count),
+ "average overall miss latency"),
+ ADD_STAT(overallAvgMissLatency,
+ UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count),
+ "average overall miss latency"),
+ ADD_STAT(blockedCycles, UNIT_CYCLE, "number of cycles access was blocked"),
+ ADD_STAT(blockedCauses, UNIT_COUNT, "number of times access was blocked"),
+ ADD_STAT(avgBlocked, UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count),
+ "average number of cycles each access was blocked"),
+ ADD_STAT(unusedPrefetches, UNIT_COUNT,
"number of HardPF blocks evicted w/o reference"),
- ADD_STAT(writebacks, "number of writebacks"),
- ADD_STAT(demandMshrHits, "number of demand (read+write) MSHR hits"),
- ADD_STAT(overallMshrHits, "number of overall MSHR hits"),
- ADD_STAT(demandMshrMisses, "number of demand (read+write) MSHR misses"),
- ADD_STAT(overallMshrMisses, "number of overall MSHR misses"),
- ADD_STAT(overallMshrUncacheable,
+ ADD_STAT(writebacks, UNIT_COUNT, "number of writebacks"),
+ ADD_STAT(demandMshrHits, UNIT_COUNT,
+ "number of demand (read+write) MSHR hits"),
+ ADD_STAT(overallMshrHits, UNIT_COUNT, "number of overall MSHR hits"),
+ ADD_STAT(demandMshrMisses, UNIT_COUNT,
+ "number of demand (read+write) MSHR misses"),
+ ADD_STAT(overallMshrMisses, UNIT_COUNT, "number of overall MSHR misses"),
+ ADD_STAT(overallMshrUncacheable, UNIT_COUNT,
"number of overall MSHR uncacheable misses"),
- ADD_STAT(demandMshrMissLatency,
+ ADD_STAT(demandMshrMissLatency, UNIT_TICK,
"number of demand (read+write) MSHR miss ticks"),
- ADD_STAT(overallMshrMissLatency, "number of overall MSHR miss ticks"),
- ADD_STAT(overallMshrUncacheableLatency,
+ ADD_STAT(overallMshrMissLatency, UNIT_TICK,
+ "number of overall MSHR miss ticks"),
+ ADD_STAT(overallMshrUncacheableLatency, UNIT_TICK,
"number of overall MSHR uncacheable ticks"),
- ADD_STAT(demandMshrMissRate, "mshr miss ratio for demand accesses"),
- ADD_STAT(overallMshrMissRate, "mshr miss ratio for overall accesses"),
- ADD_STAT(demandAvgMshrMissLatency, "average overall mshr miss latency"),
- ADD_STAT(overallAvgMshrMissLatency, "average overall mshr miss latency"),
+ ADD_STAT(demandMshrMissRate, UNIT_RATIO,
+ "mshr miss ratio for demand accesses"),
+ ADD_STAT(overallMshrMissRate, UNIT_RATIO,
+ "mshr miss ratio for overall accesses"),
+ ADD_STAT(demandAvgMshrMissLatency,
+ UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count),
+ "average overall mshr miss latency"),
+ ADD_STAT(overallAvgMshrMissLatency,
+ UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count),
+ "average overall mshr miss latency"),
ADD_STAT(overallAvgMshrUncacheableLatency,
+ UNIT_RATE(Stats::Units::Cycle, Stats::Units::Count),
"average overall mshr uncacheable latency"),
- ADD_STAT(replacements, "number of replacements"),
- ADD_STAT(dataExpansions, "number of data expansions"),
- ADD_STAT(dataContractions, "number of data contractions"),
+ ADD_STAT(replacements, UNIT_COUNT, "number of replacements"),
+ ADD_STAT(dataExpansions, UNIT_COUNT,"number of data expansions"),
+ ADD_STAT(dataContractions, UNIT_COUNT, "number of data contractions"),
cmd(MemCmd::NUM_MEM_CMDS)
{
for (int idx = 0; idx < MemCmd::NUM_MEM_CMDS; ++idx)