mem-cache: Fix non-bijective function in Skewed caches

[gem5.git] / src / mem / cache / noncoherent_cache.cc

diff --git a/src/mem/cache/noncoherent_cache.cc b/src/mem/cache/noncoherent_cache.cc
index bf75be4d6852c4a014322e703f9c08930811b1f6..fb8193a9963ada4cc6c7c3db66e3cedcdeb2b977 100644 (file)
--- a/src/mem/cache/noncoherent_cache.cc
+++ b/src/mem/cache/noncoherent_cache.cc
@@ -170,7 +170,7 @@ NoncoherentCache::createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk,
 
 
 Cycles
-NoncoherentCache::handleAtomicReqMiss(PacketPtr pkt, CacheBlk *blk,
+NoncoherentCache::handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk,
                                       PacketList &writebacks)
 {
     PacketPtr bus_pkt = createMissPacket(pkt, blk, true);
@@ -299,7 +299,6 @@ NoncoherentCache::serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt,
 
             // We have filled the block and the prefetcher does not
             // require responses.
-            delete tgt_pkt->req;
             delete tgt_pkt;
             break;