mem-cache: Fix set and way of sub-entries

[gem5.git] / src / mem / cache / noncoherent_cache.hh

diff --git a/src/mem/cache/noncoherent_cache.hh b/src/mem/cache/noncoherent_cache.hh
index fea3cd980100c74bcd2efe1a292487d2f1b678e9..3da87d90e0966bcca270e53ce506267fcc59da4f 100644 (file)
--- a/src/mem/cache/noncoherent_cache.hh
+++ b/src/mem/cache/noncoherent_cache.hh
@@ -86,7 +86,7 @@ class NoncoherentCache : public BaseCache
     void doWritebacksAtomic(PacketList& writebacks) override;
 
     void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt,
-                            CacheBlk *blk, PacketList& writebacks) override;
+                            CacheBlk *blk) override;
 
     void recvTimingResp(PacketPtr pkt) override;
 
@@ -125,8 +125,6 @@ class NoncoherentCache : public BaseCache
 
     M5_NODISCARD PacketPtr evictBlock(CacheBlk *blk) override;
 
-    void evictBlock(CacheBlk *blk, PacketList &writebacks) override;
-
   public:
     NoncoherentCache(const NoncoherentCacheParams *p);
 };