#ifndef __MEM_CACHE_PREFETCH_BASE_HH__
#define __MEM_CACHE_PREFETCH_BASE_HH__
+#include <cstdint>
+
#include "base/statistics.hh"
+#include "base/types.hh"
#include "mem/packet.hh"
-#include "params/BasePrefetcher.hh"
+#include "mem/request.hh"
#include "sim/clocked_object.hh"
+#include "sim/probe/probe.hh"
class BaseCache;
+struct BasePrefetcherParams;
class BasePrefetcher : public ClockedObject
{
+ class PrefetchListener : public ProbeListenerArgBase<PacketPtr>
+ {
+ public:
+ PrefetchListener(BasePrefetcher &_parent, ProbeManager *pm,
+ const std::string &name)
+ : ProbeListenerArgBase(pm, name),
+ parent(_parent) {}
+ void notify(const PacketPtr &pkt) override;
+ protected:
+ BasePrefetcher &parent;
+ };
+
+ std::vector<PrefetchListener *> listeners;
protected:
+ /**
+ * Class containing the information needed by the prefetch to train and
+ * generate new prefetch requests.
+ */
+ class PrefetchInfo {
+ /** The address. */
+ Addr address;
+ /** The program counter that generated this address. */
+ Addr pc;
+ /** The requestor ID that generated this address. */
+ MasterID masterId;
+ /** Validity bit for the PC of this address. */
+ bool validPC;
+ /** Whether this address targets the secure memory space. */
+ bool secure;
+
+ public:
+ /**
+ * Obtains the address value of this Prefetcher address.
+ * @return the addres value.
+ */
+ Addr getAddr() const
+ {
+ return address;
+ }
+
+ /**
+ * Returns true if the address targets the secure memory space.
+ * @return true if the address targets the secure memory space.
+ */
+ bool isSecure() const
+ {
+ return secure;
+ }
+
+ /**
+ * Returns the program counter that generated this request.
+ * @return the pc value
+ */
+ Addr getPC() const
+ {
+ assert(hasPC());
+ return pc;
+ }
+
+ /**
+ * Returns true if the associated program counter is valid
+ * @return true if the program counter has a valid value
+ */
+ bool hasPC() const
+ {
+ return validPC;
+ }
+
+ /**
+ * Gets the requestor ID that generated this address
+ * @return the requestor ID that generated this address
+ */
+ MasterID getMasterId() const
+ {
+ return masterId;
+ }
+
+ /**
+ * Check for equality
+ * @param pfi PrefetchInfo to compare against
+ * @return True if this object and the provided one are equal
+ */
+ bool sameAddr(PrefetchInfo const &pfi) const
+ {
+ return this->getAddr() == pfi.getAddr() &&
+ this->isSecure() == pfi.isSecure();
+ }
+
+ /**
+ * Constructs a PrefetchInfo using a PacketPtr.
+ * @param pkt PacketPtr used to generate the PrefetchInfo
+ * @param addr the address value of the new object
+ */
+ PrefetchInfo(PacketPtr pkt, Addr addr);
+
+ /**
+ * Constructs a PrefetchInfo using a new address value and
+ * another PrefetchInfo as a reference.
+ * @param pfi PrefetchInfo used to generate this new object
+ * @param addr the address value of the new object
+ */
+ PrefetchInfo(PrefetchInfo const &pfi, Addr addr);
+ };
+
// PARAMETERS
/** Pointr to the parent cache. */
/** log_2(block size of the parent cache). */
unsigned lBlkSize;
- /** System we belong to */
- System* system;
-
/** Only consult prefetcher on cache misses? */
- bool onMiss;
+ const bool onMiss;
/** Consult prefetcher on reads? */
- bool onRead;
+ const bool onRead;
/** Consult prefetcher on reads? */
- bool onWrite;
+ const bool onWrite;
/** Consult prefetcher on data accesses? */
- bool onData;
+ const bool onData;
/** Consult prefetcher on instruction accesses? */
- bool onInst;
+ const bool onInst;
/** Request id for prefetches */
- MasterID masterId;
+ const MasterID masterId;
const Addr pageBytes;
+ /** Prefetch on every access, not just misses */
+ const bool prefetchOnAccess;
+
+ /** Use Virtual Addresses for prefetching */
+ const bool useVirtualAddresses;
+
/** Determine if this access should be observed */
bool observeAccess(const PacketPtr &pkt) const;
/** Build the address of the i-th block inside the page */
Addr pageIthBlockAddress(Addr page, uint32_t i) const;
-
Stats::Scalar pfIssued;
public:
virtual ~BasePrefetcher() {}
- virtual void setCache(BaseCache *_cache);
+ void setCache(BaseCache *_cache);
/**
* Notify prefetcher of cache access (may be any access or just
* misses, depending on cache parameters.)
- * @retval Time of next prefetch availability, or MaxTick if none.
*/
- virtual Tick notify(const PacketPtr &pkt) = 0;
+ virtual void notify(const PacketPtr &pkt, const PrefetchInfo &pfi) = 0;
virtual PacketPtr getPacket() = 0;
virtual Tick nextPrefetchReadyTime() const = 0;
- virtual void regStats();
+ /**
+ * Register local statistics.
+ */
+ void regStats() override;
+
+ /**
+ * Register probe points for this object.
+ */
+ void regProbeListeners() override;
+
+ /**
+ * Process a notification event from the ProbeListener.
+ * @param pkt The memory request causing the event
+ */
+ void probeNotify(const PacketPtr &pkt);
+
+ /**
+ * Add a SimObject and a probe name to listen events from
+ * @param obj The SimObject pointer to listen from
+ * @param name The probe name
+ */
+ void addEventProbe(SimObject *obj, const char *name);
};
#endif //__MEM_CACHE_PREFETCH_BASE_HH__