* Definitions a fully associative LRU tagstore.
*/
+#include <cassert>
#include <sstream>
-#include <assert.h>
-
-#include "mem/cache/tags/fa_lru.hh"
#include "base/intmath.hh"
#include "base/misc.hh"
+#include "mem/cache/tags/fa_lru.hh"
using namespace std;
-FALRU::FALRU(int _blkSize, int _size, int hit_latency)
- : blkSize(_blkSize), size(_size),
- numBlks(size/blkSize), hitLatency(hit_latency)
+FALRU::FALRU(unsigned _blkSize, unsigned _size, unsigned hit_latency)
+ : blkSize(_blkSize), size(_size), hitLatency(hit_latency)
{
if (!isPowerOf2(blkSize))
fatal("cache block size (in bytes) `%d' must be a power of two",
warmedUp = false;
warmupBound = size/blkSize;
+ numBlocks = size/blkSize;
- blks = new FALRUBlk[numBlks];
+ blks = new FALRUBlk[numBlocks];
head = &(blks[0]);
- tail = &(blks[numBlks-1]);
+ tail = &(blks[numBlocks-1]);
head->prev = NULL;
head->next = &(blks[1]);
head->inCache = cacheMask;
- tail->prev = &(blks[numBlks-2]);
+ tail->prev = &(blks[numBlocks-2]);
tail->next = NULL;
tail->inCache = 0;
- int index = (1 << 17) / blkSize;
- int j = 0;
+ unsigned index = (1 << 17) / blkSize;
+ unsigned j = 0;
int flags = cacheMask;
- for (int i = 1; i < numBlks-1; i++) {
+ for (unsigned i = 1; i < numBlocks - 1; i++) {
blks[i].inCache = flags;
if (i == index - 1){
cacheBoundaries[j] = &(blks[i]);
blks[i].isTouched = false;
}
assert(j == numCaches);
- assert(index == numBlks);
+ assert(index == numBlocks);
//assert(check());
}
.desc("The number of accesses to the FA LRU cache.")
;
- for (int i = 0; i < numCaches+1; ++i) {
+ for (unsigned i = 0; i <= numCaches; ++i) {
stringstream size_str;
if (i < 3){
size_str << (1<<(i+7)) <<"K";
return NULL;
}
-bool
-FALRU::probe(Addr addr) const
-{
- Addr blkAddr = blkAlign(addr);
- FALRUBlk* blk = hashLookup(blkAddr);
- return blk && blk->tag == blkAddr && blk->isValid();
-}
-
void
FALRU::invalidateBlk(FALRU::BlkType *blk)
{
}
FALRUBlk*
-FALRU::findBlock(Addr addr, int &lat, int *inCache)
+FALRU::accessBlock(Addr addr, int &lat, int context_src, int *inCache)
{
accesses++;
int tmp_in_cache = 0;
if (blk && blk->isValid()) {
assert(blk->tag == blkAddr);
tmp_in_cache = blk->inCache;
- for (int i = 0; i < numCaches; i++) {
+ for (unsigned i = 0; i < numCaches; i++) {
if (1<<i & blk->inCache) {
hits[i]++;
} else {
}
} else {
blk = NULL;
- for (int i = 0; i < numCaches+1; ++i) {
+ for (unsigned i = 0; i <= numCaches; ++i) {
misses[i]++;
}
}
}
FALRUBlk*
-FALRU::findReplacement(Addr addr, PacketList &writebacks)
+FALRU::findVictim(Addr addr, PacketList &writebacks)
{
FALRUBlk * blk = tail;
assert(blk->inCache == 0);
blk->isTouched = true;
if (!warmedUp && tagsInUse.value() >= warmupBound) {
warmedUp = true;
- warmupCycle = curTick;
+ warmupCycle = curTick();
}
}
//assert(check());
return blk;
}
+void
+FALRU::insertBlock(Addr addr, FALRU::BlkType *blk, int context_src)
+{
+}
+
void
FALRU::moveToHead(FALRUBlk *blk)
{
int updateMask = blk->inCache ^ cacheMask;
- for (int i = 0; i < numCaches; i++){
+ for (unsigned i = 0; i < numCaches; i++){
if ((1<<i) & updateMask) {
cacheBoundaries[i]->inCache &= ~(1<<i);
cacheBoundaries[i] = cacheBoundaries[i]->prev;
}
return true;
}
+
+void
+FALRU::clearLocks()
+{
+ for (int i = 0; i < numBlocks; i++){
+ blks[i].clearLoadLocks();
+ }
+}