/*
* Copyright (c) 2012-2013, 2015 ARM Limited
* Copyright (c) 2016 Google Inc.
+ * Copyright (c) 2017, Centre National de la Recherche Scientifique
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
* Authors: Thomas Grass
* Andreas Hansson
* Rahul Thakur
+ * Pierre-Yves Peneau
*/
#include "mem/comm_monitor.hh"
: MemObject(params),
masterPort(name() + "-master", *this),
slavePort(name() + "-slave", *this),
- samplePeriodicEvent(this),
+ samplePeriodicEvent([this]{ samplePeriodic(); }, name()),
samplePeriodTicks(params->sample_period),
samplePeriod(params->sample_period / SimClock::Float::s),
stats(params)
stats.writeTransHist
.init(params()->transaction_bins)
.name(name() + ".writeTransHist")
- .desc("Histogram of read transactions per sample period")
+ .desc("Histogram of write transactions per sample period")
.flags(stats.disableTransactionHists ? nozero : pdf);
stats.readAddrDist