mem-cache: Create an address aware TempCacheBlk

[gem5.git] / src / mem / comm_monitor.hh

diff --git a/src/mem/comm_monitor.hh b/src/mem/comm_monitor.hh
index 5ccce80370f218f1a8bfab4a7be67ed3d573f7bc..d27594d232f0f158dde263c0b2a0566892ebbf1d 100644 (file)
--- a/src/mem/comm_monitor.hh
+++ b/src/mem/comm_monitor.hh
@@ -1,6 +1,8 @@
 /*
  * Copyright (c) 2012-2013, 2015 ARM Limited
- * All rights reserved
+ * Copyright (c) 2016 Google Inc.
+ * Copyright (c) 2017, Centre National de la Recherche Scientifique
+ * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
  * not be construed as granting a license to any other intellectual
@@ -36,6 +38,8 @@
  *
  * Authors: Thomas Grass
  *          Andreas Hansson
+ *          Rahul Thakur
+ *          Pierre-Yves Peneau
  */
 
 #ifndef __MEM_COMM_MONITOR_HH__
@@ -269,7 +273,7 @@ class CommMonitor : public MemObject
     struct MonitorStats
     {
 
-        /** Disable flag for burst length historgrams **/
+        /** Disable flag for burst length histograms **/
         bool disableBurstLengthHists;
 
         /** Histogram of read burst lengths */
@@ -357,6 +361,12 @@ class CommMonitor : public MemObject
         /** Disable flag for address distributions. */
         bool disableAddrDists;
 
+        /** Address mask for sources of read accesses to be captured */
+        const Addr readAddrMask;
+
+        /** Address mask for sources of write accesses to be captured */
+        const Addr writeAddrMask;
+
         /**
          * Histogram of number of read accesses to addresses over
          * time.
@@ -385,16 +395,22 @@ class CommMonitor : public MemObject
             outstandingReadReqs(0), outstandingWriteReqs(0),
             disableTransactionHists(params->disable_transaction_hists),
             readTrans(0), writeTrans(0),
-            disableAddrDists(params->disable_addr_dists)
+            disableAddrDists(params->disable_addr_dists),
+            readAddrMask(params->read_addr_mask),
+            writeAddrMask(params->write_addr_mask)
         { }
 
+        void updateReqStats(const ProbePoints::PacketInfo& pkt, bool is_atomic,
+                            bool expects_response);
+        void updateRespStats(const ProbePoints::PacketInfo& pkt, Tick latency,
+                             bool is_atomic);
     };
 
     /** This function is called periodically at the end of each time bin */
     void samplePeriodic();
 
     /** Periodic event called at the end of each simulation time bin */
-    EventWrapper<CommMonitor, &CommMonitor::samplePeriodic> samplePeriodicEvent;
+    EventFunctionWrapper samplePeriodicEvent;
 
     /**
      *@{
@@ -406,12 +422,6 @@ class CommMonitor : public MemObject
     /** Sample period in seconds */
     const double samplePeriod;
 
-    /** Address mask for sources of read accesses to be captured */
-    const Addr readAddrMask;
-
-    /** Address mask for sources of write accesses to be captured */
-    const Addr writeAddrMask;
-
     /** @} */
 
     /** Instantiate stats */