mem-cache: Add match functions to QueueEntry

[gem5.git] / src / mem / drampower.cc

diff --git a/src/mem/drampower.cc b/src/mem/drampower.cc
index a7339656a9744fbf4daa5a46065f0a5034023207..c4cdfb9cce133f0da0c9c88996503b808b3d728c 100644 (file)
--- a/src/mem/drampower.cc
+++ b/src/mem/drampower.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (const c) 2014 ARM Limited
+ * Copyright (c) 2014 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -10,7 +10,7 @@
  * terms below provided that you ensure that this notice is replicated
  * unmodified and in its entirety in all distributions of the software,
  * modified or unmodified, in source code or in binary form.
-
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are
  * met: redistributions of source code must retain the above copyright
@@ -27,21 +27,20 @@
  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (const INCLUDING, BUT NOT
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (const INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
  * Authors: Omar Naji
  */
 
-#include "base/intmath.hh"
 #include "mem/drampower.hh"
-#include "sim/core.hh"
 
-using namespace Data;
+#include "base/intmath.hh"
+#include "sim/core.hh"
 
 DRAMPower::DRAMPower(const DRAMCtrlParams* p, bool include_io) :
     powerlib(libDRAMPower(getMemSpec(p), include_io))
@@ -155,7 +154,8 @@ DRAMPower::getDataRate(const DRAMCtrlParams* p)
 {
     uint32_t burst_cycles = divCeil(p->tBURST, p->tCK);
     uint8_t data_rate = p->burst_length / burst_cycles;
-    if (data_rate != 1 && data_rate != 2)
-        fatal("Got unexpected data rate %d, should be 1 or 2\n");
+    // 4 for GDDR5
+    if (data_rate != 1 && data_rate != 2 && data_rate != 4)
+        fatal("Got unexpected data rate %d, should be 1 or 2 or 4\n");
     return data_rate;
 }