mem-cache: Create an address aware TempCacheBlk

[gem5.git] / src / mem / dramsim2.cc

diff --git a/src/mem/dramsim2.cc b/src/mem/dramsim2.cc
index 106ea264fd4cd795d6059bd5cfae1c595f32d608..b900d4df07d71769b7251e6ee5e9855e2707769c 100644 (file)
--- a/src/mem/dramsim2.cc
+++ b/src/mem/dramsim2.cc
@@ -53,7 +53,8 @@ DRAMSim2::DRAMSim2(const Params* p) :
             p->traceFile, p->range.size() / 1024 / 1024, p->enableDebug),
     retryReq(false), retryResp(false), startTick(0),
     nbrOutstandingReads(0), nbrOutstandingWrites(0),
-    sendResponseEvent(this), tickEvent(this)
+    sendResponseEvent([this]{ sendResponse(); }, name()),
+    tickEvent([this]{ tick(); }, name())
 {
     DPRINTF(DRAMSim2,
             "Instantiated DRAMSim2 with clock %d ns and queue size %d\n",