cpu: Apply the ARM TLB rework to the O3 checker CPU.

[gem5.git] / src / mem / external_slave.cc

diff --git a/src/mem/external_slave.cc b/src/mem/external_slave.cc
index 6266f6649a7336b11059bec834b0bc91397adc05..ae81e1b15e26e1fe93cff0a4a468f203f95f0c05 100644 (file)
--- a/src/mem/external_slave.cc
+++ b/src/mem/external_slave.cc
@@ -181,7 +181,7 @@ ExternalSlave::ExternalPort::getAddrRanges() const
 }
 
 ExternalSlave::ExternalSlave(ExternalSlaveParams *params) :
-    MemObject(params),
+    SimObject(params),
     externalPort(NULL),
     portName(params->name + ".port"),
     portType(params->port_type),
@@ -216,7 +216,7 @@ ExternalSlave::getPort(const std::string &if_name, PortID idx)
         }
         return *externalPort;
     } else {
-        return MemObject::getPort(if_name, idx);
+        return SimObject::getPort(if_name, idx);
     }
 }