cpu: Apply the ARM TLB rework to the O3 checker CPU.

[gem5.git] / src / mem / external_slave.hh

diff --git a/src/mem/external_slave.hh b/src/mem/external_slave.hh
index cfe89b98a27a65519de8d33900920819fcdccd91..ab33fc53b05d1831c3461dabaff14c298f867eb4 100644 (file)
--- a/src/mem/external_slave.hh
+++ b/src/mem/external_slave.hh
@@ -60,10 +60,11 @@
 #ifndef __MEM_EXTERNAL_SLAVE_HH__
 #define __MEM_EXTERNAL_SLAVE_HH__
 
-#include "mem/mem_object.hh"
+#include "mem/port.hh"
 #include "params/ExternalSlave.hh"
+#include "sim/sim_object.hh"
 
-class ExternalSlave : public MemObject
+class ExternalSlave : public SimObject
 {
   public:
     /** Derive from this class to create an external port interface */