cpu: fix bug when TrafficGen deschedules event

[gem5.git] / src / mem / fs_translating_port_proxy.cc

diff --git a/src/mem/fs_translating_port_proxy.cc b/src/mem/fs_translating_port_proxy.cc
index 2e9a0fa00adf95a633e97c429867e9e8aebf6912..52e8b49d812bdb26c0f998bf118d3d13c5dbe3fe 100644 (file)
--- a/src/mem/fs_translating_port_proxy.cc
+++ b/src/mem/fs_translating_port_proxy.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011 ARM Limited
+ * Copyright (c) 2011,2013 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -46,20 +46,24 @@
  * Port object definitions.
  */
 
+#include "arch/vtophys.hh"
 #include "base/chunk_generator.hh"
 #include "cpu/base.hh"
 #include "cpu/thread_context.hh"
 #include "mem/fs_translating_port_proxy.hh"
+#include "sim/system.hh"
 
 using namespace TheISA;
 
 FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc)
-    : PortProxy(tc->getCpuPtr()->getDataPort()), _tc(tc)
+    : PortProxy(tc->getCpuPtr()->getDataPort(),
+                tc->getSystemPtr()->cacheLineSize()), _tc(tc)
 {
 }
 
-FSTranslatingPortProxy::FSTranslatingPortProxy(Port &port)
-    : PortProxy(port), _tc(NULL)
+FSTranslatingPortProxy::FSTranslatingPortProxy(MasterPort &port,
+                                               unsigned int cacheLineSize)
+    : PortProxy(port, cacheLineSize), _tc(NULL)
 {
 }
 
@@ -140,7 +144,7 @@ CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen)
     bool foundNull = false;
     while ((dst - start + 1) < maxlen && !foundNull) {
         vp.readBlob(vaddr++, (uint8_t*)dst, 1);
-        if (dst == '\0')
+        if (*dst == '\0')
             foundNull = true;
         dst++;
     }