/*
- * Copyright (c) 2011 ARM Limited
+ * Copyright (c) 2011,2013 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* Port object definitions.
*/
+#include "arch/vtophys.hh"
#include "base/chunk_generator.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "mem/fs_translating_port_proxy.hh"
+#include "sim/system.hh"
using namespace TheISA;
FSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc)
- : PortProxy(tc->getCpuPtr()->getDataPort()), _tc(tc)
+ : PortProxy(tc->getCpuPtr()->getDataPort(),
+ tc->getSystemPtr()->cacheLineSize()), _tc(tc)
{
}
-FSTranslatingPortProxy::FSTranslatingPortProxy(MasterPort &port)
- : PortProxy(port), _tc(NULL)
+FSTranslatingPortProxy::FSTranslatingPortProxy(MasterPort &port,
+ unsigned int cacheLineSize)
+ : PortProxy(port, cacheLineSize), _tc(NULL)
{
}
}
void
-FSTranslatingPortProxy::writeBlob(Addr addr, uint8_t *p, int size) const
+FSTranslatingPortProxy::writeBlob(Addr addr, const uint8_t *p, int size) const
{
Addr paddr;
for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done();
}
void
-CopyIn(ThreadContext *tc, Addr dest, void *source, size_t cplen)
+CopyIn(ThreadContext *tc, Addr dest, const void *source, size_t cplen)
{
uint8_t *src = (uint8_t *)source;
tc->getVirtProxy().writeBlob(dest, src, cplen);
bool foundNull = false;
while ((dst - start + 1) < maxlen && !foundNull) {
vp.readBlob(vaddr++, (uint8_t*)dst, 1);
- if (dst == '\0')
+ if (*dst == '\0')
foundNull = true;
dst++;
}
}
void
-CopyStringIn(ThreadContext *tc, char *src, Addr vaddr)
+CopyStringIn(ThreadContext *tc, const char *src, Addr vaddr)
{
FSTranslatingPortProxy &vp = tc->getVirtProxy();
for (ChunkGenerator gen(vaddr, strlen(src), TheISA::PageBytes); !gen.done();