mem-cache: Add setters to validate and secure block

[gem5.git] / src / mem / mem_checker_monitor.cc

diff --git a/src/mem/mem_checker_monitor.cc b/src/mem/mem_checker_monitor.cc
index e70e4f856745ee99e77da8584525138253846faf..ee7eb3fcc8c7b88ead0155432f3089e3ee1cb465 100644 (file)
--- a/src/mem/mem_checker_monitor.cc
+++ b/src/mem/mem_checker_monitor.cc
@@ -39,14 +39,13 @@
  *          Marco Elver
  */
 
+#include "mem/mem_checker_monitor.hh"
+
 #include <memory>
 
 #include "base/output.hh"
 #include "base/trace.hh"
 #include "debug/MemCheckerMonitor.hh"
-#include "mem/mem_checker_monitor.hh"
-
-using namespace std;
 
 MemCheckerMonitor::MemCheckerMonitor(Params* params)
     : MemObject(params),
@@ -156,8 +155,8 @@ MemCheckerMonitor::recvTimingReq(PacketPtr pkt)
     bool is_write = pkt->isWrite();
     unsigned size = pkt->getSize();
     Addr addr = pkt->getAddr();
-    bool expects_response = pkt->needsResponse() && !pkt->memInhibitAsserted();
-    std::unique_ptr<uint8_t> pkt_data;
+    bool expects_response = pkt->needsResponse() && !pkt->cacheResponding();
+    std::unique_ptr<uint8_t[]> pkt_data;
     MemCheckerMonitorSenderState* state = NULL;
 
     if (expects_response && is_write) {
@@ -165,20 +164,19 @@ MemCheckerMonitor::recvTimingReq(PacketPtr pkt)
         // write. For reads, we have no data yet, so it doesn't make sense to
         // allocate.
         pkt_data.reset(new uint8_t[size]);
-        memcpy(pkt_data.get(), pkt->getConstPtr<uint8_t*>(), size);
+        pkt->writeData(pkt_data.get());
     }
 
     // If a cache miss is served by a cache, a monitor near the memory
     // would see a request which needs a response, but this response
-    // would be inhibited and not come back from the memory. Therefore
+    // would not come back from the memory. Therefore
     // we additionally have to check the inhibit flag.
     if (expects_response && (is_read || is_write)) {
         state = new MemCheckerMonitorSenderState(0);
         pkt->pushSenderState(state);
     }
 
-    // Attempt to send the packet (always succeeds for inhibited
-    // packets)
+    // Attempt to send the packet
     bool successful = masterPort.sendTimingReq(pkt);
 
     // If not successful, restore the sender state
@@ -227,7 +225,8 @@ MemCheckerMonitor::recvTimingReq(PacketPtr pkt)
         }
     } else if (successful) {
         DPRINTF(MemCheckerMonitor,
-                "Forwarded inhibited request: addr = %#llx\n", addr);
+                "Forwarded request marked for cache response: addr = %#llx\n",
+                addr);
     }
 
     return successful;
@@ -246,7 +245,7 @@ MemCheckerMonitor::recvTimingResp(PacketPtr pkt)
     bool is_failed_LLSC = pkt->isLLSC() && pkt->req->getExtraData() == 0;
     unsigned size = pkt->getSize();
     Addr addr = pkt->getAddr();
-    std::unique_ptr<uint8_t> pkt_data;
+    std::unique_ptr<uint8_t[]> pkt_data;
     MemCheckerMonitorSenderState* received_state = NULL;
 
     if (is_read) {
@@ -254,7 +253,7 @@ MemCheckerMonitor::recvTimingResp(PacketPtr pkt)
         // a read. For writes, we have already given the MemChecker the data on
         // the request, so it doesn't make sense to allocate on write.
         pkt_data.reset(new uint8_t[size]);
-        memcpy(pkt_data.get(), pkt->getConstPtr<uint8_t*>(), size);
+        pkt->writeData(pkt_data.get());
     }
 
     if (is_read || is_write) {