mem-cache: Create an address aware TempCacheBlk

[gem5.git] / src / mem / mem_object.cc

diff --git a/src/mem/mem_object.cc b/src/mem/mem_object.cc
index cc05b7fc219aba02d79657ea115066a32d3e1119..766eceeb7faf901c1bf9ea8174721c5a48a28809 100644 (file)
--- a/src/mem/mem_object.cc
+++ b/src/mem/mem_object.cc
@@ -48,14 +48,14 @@ MemObject::MemObject(const Params *params)
 {
 }
 
-MasterPort&
-MemObject::getMasterPort(const std::string& if_name, int idx)
+BaseMasterPort&
+MemObject::getMasterPort(const std::string& if_name, PortID idx)
 {
     fatal("%s does not have any master port named %s\n", name(), if_name);
 }
 
-SlavePort&
-MemObject::getSlavePort(const std::string& if_name, int idx)
+BaseSlavePort&
+MemObject::getSlavePort(const std::string& if_name, PortID idx)
 {
     fatal("%s does not have any slave port named %s\n", name(), if_name);
 }