Cache: Remove dangling doWriteback declaration

[gem5.git] / src / mem / mem_object.hh

diff --git a/src/mem/mem_object.hh b/src/mem/mem_object.hh
index 58930ecccf303645b00ce807eca3f21dd9eb89e2..d8e6bdcb0de8a870a3b11f45a4c1e581e413d1e0 100644 (file)
--- a/src/mem/mem_object.hh
+++ b/src/mem/mem_object.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2002-2005 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -24,31 +36,57 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ron Dreslinski
+ *          Andreas Hansson
  */
 
 /**
  * @file
- * Base Memory Object decleration.
+ * MemObject declaration.
  */
 
 #ifndef __MEM_MEM_OBJECT_HH__
 #define __MEM_MEM_OBJECT_HH__
 
-#include "sim/sim_object.hh"
 #include "mem/port.hh"
+#include "params/MemObject.hh"
+#include "sim/sim_object.hh"
 
 /**
- * The base MemoryObject class, allows for an accesor function to a
- * simobj that returns the Port.
+ * The MemObject class extends the SimObject with accessor functions
+ * to get its master and slave ports.
  */
 class MemObject : public SimObject
 {
   public:
-    MemObject(const std::string &name);
+    typedef MemObjectParams Params;
+    const Params *params() const
+    { return dynamic_cast<const Params *>(_params); }
 
-  public:
-    /** Additional function to return the Port of a memory object. */
-    virtual Port *getPort(const std::string &if_name) = 0;
+    MemObject(const Params *params);
+
+    /**
+     * Get a master port with a given name and index.
+     *
+     * @param if_name Port name
+     * @param idx Index in the case of a VectorPort
+     *
+     * @return A reference to the given port
+     */
+    virtual MasterPort& getMasterPort(const std::string& if_name,
+                                      int idx = -1);
+
+    /**
+     * Get a slave port with a given name and index.
+     *
+     * @param if_name Port name
+     * @param idx Index in the case of a VectorPort
+     *
+     * @return A reference to the given port
+     */
+    virtual SlavePort& getSlavePort(const std::string& if_name,
+                                    int idx = -1);
 };
 
 #endif //__MEM_MEM_OBJECT_HH__