/*
- * Copyright (c) 2012-2015 ARM Limited
+ * Copyright (c) 2012-2016 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
IsError, //!< Error response
IsPrint, //!< Print state matching address (for debugging)
IsFlush, //!< Flush the address from caches
+ FromCache, //!< Request originated from a caching agent
NUM_COMMAND_ATTRIBUTES
};
bool needsResponse() const { return testCmdAttrib(NeedsResponse); }
bool isInvalidate() const { return testCmdAttrib(IsInvalidate); }
bool isEviction() const { return testCmdAttrib(IsEviction); }
+ bool fromCache() const { return testCmdAttrib(FromCache); }
/**
* A writeback is an eviction that carries data.
bool needsResponse() const { return cmd.needsResponse(); }
bool isInvalidate() const { return cmd.isInvalidate(); }
bool isEviction() const { return cmd.isEviction(); }
+ bool fromCache() const { return cmd.fromCache(); }
bool isWriteback() const { return cmd.isWriteback(); }
bool hasData() const { return cmd.hasData(); }
bool hasRespData() const
void setResponderHadWritable()
{
assert(cacheResponding());
+ assert(!responderHadWritable());
flags.set(RESPONDER_HAD_WRITABLE);
}
bool responderHadWritable() const
return _isSecure;
}
+ /**
+ * Accessor function to atomic op.
+ */
+ AtomicOpFunctor *getAtomicOp() const { return req->getAtomicOpFunctor(); }
+ bool isAtomicOp() const { return req->isAtomic(); }
+
/**
* It has been determined that the SC packet should successfully update
* memory. Therefore, convert this SC packet to a normal write.