ruby: 2x protocols has typo/syntax error that fails building

[gem5.git] / src / mem / page_table.hh

diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh
index 37bc808e724de29c55f723de88f10f36fa6333c0..9d2e3e3d6a876f0f64da5248be492984346d183f 100644 (file)
--- a/src/mem/page_table.hh
+++ b/src/mem/page_table.hh
@@ -1,4 +1,5 @@
 /*
+ * Copyright (c) 2014 Advanced Micro Devices, Inc.
  * Copyright (c) 2003 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -30,74 +31,108 @@
 
 /**
  * @file
- * Declaration of a non-full system Page Table.
+ * Declarations of a non-full system Page Table.
  */
 
 #ifndef __MEM_PAGE_TABLE_HH__
 #define __MEM_PAGE_TABLE_HH__
 
 #include <string>
+#include <unordered_map>
 
-#include "arch/isa_traits.hh"
-#include "arch/tlb.hh"
-#include "base/hashmap.hh"
+#include "base/intmath.hh"
 #include "base/types.hh"
-#include "config/full_system.hh"
-#include "config/the_isa.hh"
 #include "mem/request.hh"
 #include "sim/serialize.hh"
 
-#if !FULL_SYSTEM
-class Process;
-#endif
+class ThreadContext;
 
-/**
- * Page Table Declaration.
- */
-class PageTable
+class EmulationPageTable : public Serializable
 {
-  protected:
-    typedef m5::hash_map<Addr, TheISA::TlbEntry> PTable;
-    typedef PTable::iterator PTableItr;
-    PTable pTable;
+  public:
+    struct Entry
+    {
+        Addr paddr;
+        uint64_t flags;
 
-    struct cacheElement {
-        Addr vaddr;
-        TheISA::TlbEntry entry;
+        Entry(Addr paddr, uint64_t flags) : paddr(paddr), flags(flags) {}
+        Entry() {}
     };
 
-    struct cacheElement pTableCache[3];
+  protected:
+    typedef std::unordered_map<Addr, Entry> PTable;
+    typedef PTable::iterator PTableItr;
+    PTable pTable;
 
     const Addr pageSize;
     const Addr offsetMask;
 
-#if !FULL_SYSTEM
-    Process *process;
-#endif
+    const uint64_t _pid;
+    const std::string _name;
 
   public:
 
-    PageTable(
-#if !FULL_SYSTEM
-            Process *_process,
-#endif
-            Addr _pageSize = TheISA::VMPageSize);
+    EmulationPageTable(
+            const std::string &__name, uint64_t _pid, Addr _pageSize) :
+            pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
+            _pid(_pid), _name(__name), shared(false)
+    {
+        assert(isPowerOf2(pageSize));
+    }
+
+    uint64_t pid() const { return _pid; };
+
+    virtual ~EmulationPageTable() {};
+
+    /* generic page table mapping flags
+     *              unset | set
+     * bit 0 - no-clobber | clobber
+     * bit 2 - cacheable  | uncacheable
+     * bit 3 - read-write | read-only
+     */
+    enum MappingFlags : uint32_t {
+        Clobber     = 1,
+        Uncacheable = 4,
+        ReadOnly    = 8,
+    };
+
+    // flag which marks the page table as shared among software threads
+    bool shared;
+
+    virtual void initState() {};
 
-    ~PageTable();
+    // for DPRINTF compatibility
+    const std::string name() const { return _name; }
 
     Addr pageAlign(Addr a)  { return (a & ~offsetMask); }
     Addr pageOffset(Addr a) { return (a &  offsetMask); }
 
-    void allocate(Addr vaddr, int64_t size);
-    void remap(Addr vaddr, int64_t size, Addr new_vaddr);
-    void deallocate(Addr vaddr, int64_t size);
+    /**
+     * Maps a virtual memory region to a physical memory region.
+     * @param vaddr The starting virtual address of the region.
+     * @param paddr The starting physical address where the region is mapped.
+     * @param size The length of the region.
+     * @param flags Generic mapping flags that can be set by or-ing values
+     *              from MappingFlags enum.
+     */
+    virtual void map(Addr vaddr, Addr paddr, int64_t size, uint64_t flags = 0);
+    virtual void remap(Addr vaddr, int64_t size, Addr new_vaddr);
+    virtual void unmap(Addr vaddr, int64_t size);
+
+    /**
+     * Check if any pages in a region are already allocated
+     * @param vaddr The starting virtual address of the region.
+     * @param size The length of the region.
+     * @return True if no pages in the region are mapped.
+     */
+    virtual bool isUnmapped(Addr vaddr, int64_t size);
 
     /**
      * Lookup function
      * @param vaddr The virtual address.
-     * @return entry The page table entry corresponding to vaddr.
+     * @return The page table entry corresponding to vaddr.
      */
-    bool lookup(Addr vaddr, TheISA::TlbEntry &entry);
+    const Entry *lookup(Addr vaddr);
 
     /**
      * Translate function
@@ -119,27 +154,12 @@ class PageTable
      * field of req.
      * @param req The memory request.
      */
-    Fault translate(RequestPtr req);
-
-    /**
-     * Update the page table cache.
-     * @param vaddr virtual address (page aligned) to check
-     * @param pte page table entry to return
-     */
-    inline void updateCache(Addr vaddr, TheISA::TlbEntry entry)
-    {
-        pTableCache[2].entry = pTableCache[1].entry;
-        pTableCache[2].vaddr = pTableCache[1].vaddr;
-        pTableCache[1].entry = pTableCache[0].entry;
-        pTableCache[1].vaddr = pTableCache[0].vaddr;
-        pTableCache[0].entry = entry;
-        pTableCache[0].vaddr = vaddr;
-    }
-
+    Fault translate(const RequestPtr &req);
 
-    void serialize(std::ostream &os);
+    void getMappings(std::vector<std::pair<Addr, Addr>> *addr_mappings);
 
-    void unserialize(Checkpoint *cp, const std::string &section);
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 };
 
 #endif // __MEM_PAGE_TABLE_HH__